Technical Library | 2010-03-18 14:02:03.0
Selecting products that have been qualified by industry standards for use in printed circuit board assembly processes is an accepted best practice. That products which have been qualified, when used in combinations not specifically qualified, may have resultant properties detrimental to assembly function though, is often not adequately understood. Printed circuit boards, solder masks, soldering materials (flux, paste, cored wire, rework flux, paste flux, etc.), adhesives, and inks, when qualified per industry standards, are qualified using very specific test methods which may not adequately mimic the assembly process ultimately used.
Technical Library | 2013-01-29 15:48:08.0
Choosing a new wire Cutting and Stripping (C&S) machine can be like shopping for a new car. With so many choices, where does one start? A nice, little sports car might be fun to have, but how often will it just sit there because it can’t carry a car load of kids or some odd-sized goods from the local home improvement store? You just might be better off with a midsize SUV that does a pretty good job at doing everything you need it to do.
Technical Library | 2013-12-11 23:24:32.0
Today's analyses of electronics reliability at the system level typically use a "black box approach", with relatively poor understanding of the behaviors and performances of such "black boxes" and how they physically and electrically interact (...) The incorporation of more rigorous and more informative approaches and techniques needs to better understand (...) Understanding the Physics of Failure (PoF) is imperative. It is a formalized and structured approach to Failure Analysis/Forensics Engineering that focuses on total learning and not only fixing a particular current problem (...) In this paper we will present an explanation of various physical models that could be deployed through this method, namely, wire bond failures; thermo-mechanical fatigue; and vibration.
Technical Library | 2015-03-26 19:16:03.0
Nickel-palladium-gold-finished terminals are susceptible to creep corrosion. Excessive creep corrosion can result in device failure due to insulation resistance loss between adjacent terminals. The mixed flowing gas test has been demonstrated to produce creep corrosion on parts with nickel-palladium-gold finished terminals. Conformal coats are often used to protect printed wiring assemblies from failure due to moisture and corrosion. However, coating may not be sufficient to protect lead terminations from failure.In this study, acrylic, silicone, urethane, parylene, and atomic layer deposit (ALD) coatings were examined for their effectiveness at preventing corrosion of nickel-palladium-gold-finished terminals.
Technical Library | 2015-09-10 15:06:17.0
A new non-halogen flame retardant has been developed and is useful for a variety of high performance applications. This non-reactive phosphorus-based material satisfies fire safety needs for a broad range of resins including epoxy, polyolefin, and polyamide. The combination of excellent flame retardant efficiency, high thermal stability and exceptional electrical properties is unique to this organophosphorus flame retardant and makes it a breakthrough technology for high speed, high frequency use in fast growing wireless and wired infrastructures. Resin performance data, including formulations with synergists, are presented in this paper.
Technical Library | 2021-12-21 23:01:30.0
High density PWB (printed wiring board) with microvia technology is required for implementation of high density and high I/O area array packages (AAP). COTS (commercial off-the-shelf) AAP packaging technologies in high reliability versions with 1.27 mm pitch are now being considered for use in a number of NASA systems including the Space Shuttle and Mars Rovers. NASA functional system designs are requiring ever more denser AAP packages and board features, making board microvia technology very attractive for effectively routing a large number of package inputs/outputs.
Technical Library | 2013-03-14 17:19:28.0
Commercial-off-the-shelf ball/column grid array packaging (COTS BGA/CGA) technologies in high reliability versions are now being considered for use in a number of National Aeronautics and Space Administration (NASA) electronic systems. Understanding the process and quality assurance (QA) indicators for reliability are important for low-risk insertion of these advanced electronic packages. This talk briefly discusses an overview of packaging trends for area array packages from wire bond to flip-chip ball grid array (FCBGA) as well as column grid array (CGA). It then presents test data including manufacturing and assembly board-level reliability for FCBGA packages with 1704 I/Os and 1-mm pitch, fine pitch BGA (FPBGA) with 432 I/Os and 0.4-mm pitch, and PBGA with 676 I/Os and 1.0-mm pitch packages. First published in the 2012 IPC APEX EXPO technical conference proceedings.
Technical Library | 2016-09-15 17:10:40.0
This paper describes the purpose, methodology, and results to date of thermal endurance testing performed at the company. The intent of this thermal aging testing is to establish long term reliability data for printed wiring board (PWB) materials for use in applications that require 20+ years (100,000+ hours) of operational life under different thermal conditions. Underwriters Laboratory (UL) testing only addresses unclad laminate (resin and glass) and not a fabricated PWB that undergoes many processing steps, includes copper and plated through holes, and has a complex mechanical structure. UL testing is based on a 5000 hour expected operation life of the electronic product. Therefore, there is a need to determine the dielectric breakdown / degradation of the composite printed circuit board material and mechanical structure over time and temperature for mission critical applications.
Technical Library | 2021-05-26 00:53:26.0
This paper describes a copper electroplating enabling technology for filling microvias. Driven by the need for faster, smaller and higher performance communication and electronic devices, build-up technology incorporating microvias has emerged as a viable multilayer printed circuit manufacturing technology. Increased wiring density, reduced line widths, smaller through-holes and microvias are all attributes of these High Density Interconnect (HDI) packages. Filling the microvias with conductive material allows the use of stacked vias and via in pad designs thereby facilitating additional packaging density. Other potential design attributes include thermal management enhancement and benefits for high frequency circuitry. Electrodeposited copper can be utilized for filling microvias and provides potential advantages over alternative via plugging techniques. The features, development, scale up and results of direct current (DC) and periodic pulse reverse (PPR) acid copper via filling processes, including chemistry and equipment, are described.
Technical Library | 2012-11-01 20:54:49.0
First published in the 2012 IPC APEX EXPO technical conference proceedings. The continuous progression toward portable, high frequency microelectronic systems has placed high demands on material performance, notably low dielectric constants (Dk), low loss tangent (Df), low moisture uptake, and good thermal stability. Epoxy resins are the workhorses of the electronic industry. Significant performance enhancements have been obtained through the use of PPE telechelic macromonomers with epoxy resins. However, there is a ceiling on the performance obtainable from epoxy-based resins. Therefore, non-epoxy based dielectric materials are used to fulfill the need for higher performance.
