Electronics Forum | Sat Nov 24 22:15:16 EST 2001 | Glenn Robertson
Tony, I'm not sure if even baking will stop the voids if you have gaps in the plating. It probably doesn't take much moisture or even trapped air. I'm not speaking from a lot of direct experience here, so please run the tests and let us know wh
Electronics Forum | Fri May 02 09:37:23 EDT 2003 | Jerry Magera
Via in pad is the most efficient use of space. Blind via seems to be blamed for this. Cross-sections (send me some) will probably show a void still existing in the via or spherical voids aligned near the component pad side. One can estimate the vo
Electronics Forum | Wed Jan 16 07:49:14 EST 2002 | Yannick
Hi, In few weeks I want to test the capabilities of our SMT Line. To do that I'll design a board. I want to test: - The Printing - The component placement - The soldering - Different stencil aperture - Mixed Technology (Thr
Electronics Forum | Mon Mar 04 09:45:11 EST 2002 | Andrew H Otwell
Thanks Cal, for your comments. I'm specifically working on ways to improve how search results are presented, since we're building a very large product database. In particular, I'm implementing ways that search results can behave more like librarians:
Electronics Forum | Wed Mar 20 20:02:06 EST 2002 | davef
Surfactant. A synthetic detergent made from petrochemicals that lowers the surface tension of water and allows better cleaning in small spaces. Do you have a cleaning issue that requires you to use a surfactant? If so, be aware that you must clean
Electronics Forum | Mon Mar 25 21:50:10 EST 2002 | davef
Some of this was copped from Fred. There are numerous package types that now fall under the rubric of land grid array [LGA]. Land grid devices [ie, Bumped Chip Carrier� [BCC], LGA, Quad Flat-pack No-lead [QFN], MicroLeadFrame�, etc] are essentially
Electronics Forum | Tue Apr 09 07:41:08 EDT 2002 | johnw
Craig, it depend's n what you want to look at. In term's of te gran structure of the solder jont that's formed when the joint is cooling so you'd want to monitor the temperature drop from the peak or say 215dg C for ref down to probably about 150 an
Electronics Forum | Thu Apr 11 19:06:59 EDT 2002 | tmarc
We are using 1mm pitch BGAs with a great quantity of via(s) under the component. Very shortly we will be placing CSPs with .65mm pitch. Our via(s) are solder masked, however we generally have a percentage of them that the masking is thin enough that
Electronics Forum | Fri May 10 14:02:05 EDT 2002 | pjc
First off what bone-head designer put them there in the first place. Vias in solder lands is a big time no no. I had this problem at a CEM I worked at. I had the customer change the design but had to run the 6 samples they supplied. I ended up fillin
Electronics Forum | Sun Jun 02 23:20:39 EDT 2002 | fastek
China is way behind the technology curve and will be for some time. They're still soaking up all of the through hole and 10 year old chipshooters they can get their hands on. China is the latest flavor of the month for cheap labor just like Mexico wa
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