Electronics Forum: dave and f (Page 6 of 189)

Re: Desoldering of TSOP and TSOJ

Electronics Forum | Sun Jan 10 08:44:32 EST 1999 | Dave F

| | | HI! I am a package engineer in Korea. I have some reasons | | | to desolder excessive solder at the lead of TSOP and TSOJ | | | after removing them from the board. The way with solder wick is too time-consuming and depends on the operator. |

Re: Green coating and through-hole plating

Electronics Forum | Thu Aug 13 12:55:46 EDT 1998 | Dave F

| Hi, can you please tell me how to make green coating and through-hole plating of PCB? Thanks! | Xingsheng Xingsheng: Welcome. Bible on PCB fabrication: Printed Circuits Handbook, Clyde Coombs, McGraw-Hill Web resources: http://www.pwbrc.org/ a

Re: Ionic testing and No-Clean flux

Electronics Forum | Sat Feb 05 09:08:18 EST 2000 | Dave F

Casimir: Let me expand on something that I said in my response to your thread on ionic testing. Generally, no-clean people don�t use ROSE testing as part of their process control, because the ROSE test is essentially washing your board in DI/IPA �

Re: wave soldering surface mount tantalum and ceramic capacitors

Electronics Forum | Fri Feb 05 09:39:58 EST 1999 | Dave F

| Can anyone help me with the pros and cons of trying to wave | solder tantalum and large (1812) ceramic capacitors. I do | know that one may see fractures on larger cermaic caps, but have not seen much on the tantalums. Any insight as to what proble

Re: wave soldering surface mount tantalum and ceramic capacitors

Electronics Forum | Tue Feb 16 16:28:30 EST 1999 | Tuffty

| | Can anyone help me with the pros and cons of trying to wave | | solder tantalum and large (1812) ceramic capacitors. I do | | know that one may see fractures on larger cermaic caps, but have not seen much on the tantalums. Any insight as to what

Re: Convection Oven and thermo profiling of Circuit Boards

Electronics Forum | Mon Apr 17 19:54:39 EDT 2000 | Dave F

Sounds like a true IR guy to me!!! Your profile should reflow solder on the board properly to produce a reliable product for your customer. If that requires more than one proifile, so be it!!!. That being said, we went from hundreds of IR profiles

Re: paste release from stencil, and volume calculation

Electronics Forum | Mon Nov 15 12:09:55 EST 1999 | Dave F

Steve: Continuing with Dan�s thinking, generally, "poor release" (paste hanging-up in the stencil holes) could have three main (or combination of) causes: 1 Equipment: Stencil is too thick. Specifically, your 0.006 should be OK, providing you don�

Re: paste release from stencil, and volume calculation

Electronics Forum | Mon Nov 15 12:13:41 EST 1999 | Dave F

Steve: There are guidelines for determining if your aperture has the correct proportions to the foil thickness. Maybe that�s what you�re looking for: 1 Aspect ratio = aperture width/foil thickness Chemically etched SB GT 1.5 Laser cut SB GT 1.2

Re: Help on Qualification of Printer and Pick Place

Electronics Forum | Mon Oct 26 20:09:19 EST 1998 | Dave F

| I'm very new to the SMT process but I'm tasked to qualify a MPM Printer and a Panasert PnP m/c. The product consists of 6-10 different parts of a total of around 70. Please advice on the parameters for each m/c which I should focus on for optmizati

Re: Splicing tape for 8,12, and 16mm component tapes

Electronics Forum | Wed Jul 01 10:32:01 EDT 1998 | Eric Klaver

| How can I reach Tesa? I've tried to find a website that contains some useful information but no luck. | By the way, Siemens has stonewalled me regarding their tool/material. Seems to be reserved for Siemens | users exclusively. Joe, The address


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