Electronics Forum | Tue Jan 18 08:40:42 EST 2000 | Dave F
Hey John: Chrys wrote a good description on calculating flux density a while back. Here is our version of her procedure: 4.3 Determine the amount of flux on the board. 4.3.1 Get a piece of corrugated cardboard and a weighing scale accurate to 0.01
Electronics Forum | Sun Jan 23 13:16:02 EST 2000 | Mike Gamble
No insult intended but you are either brave or being bullied by design. My guess is the latter as no assembly plant really likes doing things against the grain of norms. We have done Via in Pad with reasonable success but it is fraught with hidden tr
Electronics Forum | Mon Jan 17 21:01:21 EST 2000 | Dave F
Dennis: On your BGAs: * Never seen voids any place other than the top ... lower density stuff rises. * Our spec on voids says: 1 Voids 1a Voids in soldered balls shall be less than 20% of the diameter of the solder ball. 1b No void shall sho
Electronics Forum | Mon Jan 17 02:40:17 EST 2000 | park kyung sam
Hi. smtman would someone answer me ? it's just the stuff pop ups without deep thinking. how much do our department spend money for 1 chip soldering. what should i consider ? i wonder i spend more money than other guys out there for 1 chip soldering i
Electronics Forum | Wed Jan 19 08:40:53 EST 2000 | Wolfgang Busko
Hi Erico, I think it�s just a naming problem. Under the topic of tombstone there are a lot of causes for different appearances of this symptom. Shouldn�t be always the errected position that occurs. In your case it seems that either the components so
Electronics Forum | Thu Jan 20 11:16:51 EST 2000 | Wolfgang Busko
Erico:I can�t even imagine what this line looks like and what it has to do with the soldering problems without having a look at it. Also the restriction to touchup only is somewhat irritating to me. The only thing that I can think of is that in your
Electronics Forum | Sat Jan 15 16:59:47 EST 2000 | Steve Thomas
Thanks, Mark. Actually we already have an established mark. We use 500ppm (99.95%) as our acceptable level. Problem is, someone (another manufacturer) told someone else (our pres.) that THEY build to 50ppm. Soooooo, someone else told my boss that
Electronics Forum | Fri Jan 14 16:58:20 EST 2000 | Dave F
Dave: You're probably correct about too much paste, given that your balling is congrigated near the center of the chips. Three things to consider: 1 Lower temperature profile @ front 3 zones 2 I've heard some stencil suppliers can plate addition
Electronics Forum | Fri Jan 14 17:24:08 EST 2000 | John Thorup
Yeah, it would be kind of expensive to replace all of your stencils but it's the only real answer. Be sure that all your new and replacement stencils have a home base or home plate shape for the passives. This reduces the paste volume near the cent
Electronics Forum | Thu Jan 13 13:16:40 EST 2000 | Dave F
Tony: You have choices: * Hi Temperature Tape: Go with Wolfgang ... too tough to control. * Selective Soldering Pallets: Some like 'em some don't. A lot of your success depends on the pallet fabricator. * Screenable Temporary Solder Mask: Wol
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