Electronics Forum: index (Page 5291 of 7929)

Re: BGA voids

Electronics Forum | Wed Jan 19 00:42:09 EST 2000 | park kyung sam

In my case, when i solderd the bga in normal reflow(convection hot air). There is a lot of boid. i had tried to reduce void long time. so i reduced just a little. It did't satisfied me but now i cannot looking for the void in soldered bga i

Re: thanks

Electronics Forum | Wed Jan 19 22:28:20 EST 2000 | Dave F

Taking things from a slightly different angle: Cost of assembling various packages based on volume: C/R placement: |$0.01 to 0.04 per part SOIC: | $0.03 PLCC based on lead count: | 20-39 $0.16 | 40-59 $0.18 | 60-79 $0.20 | 80-

Re: SMT Chip terminal lifted

Electronics Forum | Thu Jan 20 02:36:29 EST 2000 | erico

Hi wolfgang,Dave & PC: What I facing are: 1. The component lie flat on the board but only one side can get solder.The pad is ok, problem is with the chip. 2.I desolder the chip and go to view it under microscope and found that there is a line near t

Re: SMT Chip terminal lifted

Electronics Forum | Thu Jan 20 11:20:28 EST 2000 | Brian W.

It sounds like what you are seeing is leaching of the end cap. You need to check the manufacturer's spec. Many components have terminal barriers, which get a solder plating. Sometimes this plating process is not done well, and the solder plating le

Re: Problems with e-mail

Electronics Forum | Tue Jan 18 09:48:26 EST 2000 | Clifford Peaslee

Also try deleting your SMTnet cookies. I believe there may be a problem with the cookie itself. We also may force a user wide logout, in order to make sure that everyone's cookie is ok. By doing that, we would automatically delete the cookie on your

Re: acceptable defect rates for smt process, in ppm.

Electronics Forum | Sat Jan 15 13:13:33 EST 2000 | Mark Wiegold

Steve, Basically in answer to your question, there is no real set number for defects. Defect rates will vary between products and companies. If my company was running the same product as yourself then there is no reason to suggest that the defect ra

Mid Chip Solder Balls

Electronics Forum | Fri Jan 14 16:21:42 EST 2000 | Dave Chapman

We are having mid chip solder balls on chips and resistors. Seeing the problem on 80% of the assemblies we run. Anywhere from 1 to six of the balls per board. We have slowed the oven down, increased the pressure on the screenprinter to get less paste

Re: Mid Chip Solder Balls

Electronics Forum | Fri Jan 14 17:51:37 EST 2000 | Dave F

Dave: Two more things: 1. Let's go backwards, so what changed that suddenly you've realized that "piles of stencils" are causing solder ballig on chips? Are we speeding down the wrong road? Or is this something you lived with and now have decid

Re: Mid Chip Solder Balls

Electronics Forum | Mon Jan 17 08:09:05 EST 2000 | Mark Anderson

As stated previous, the following elements all have a effect on solder beading. Solder Paste, stencil apertures(reduction of home plate), stencil thickness, printing parameters, placement height, reflow preheat and soaking slope and dwell, manufactur

Re: Mid Chip Solder Balls

Electronics Forum | Fri Jan 21 10:40:15 EST 2000 | Dave Chapman

Having adjusted the profile speed slower and adjusting the temps to the recommended lower levels, amazingly the mid chips have almost disapeared (90%). It appears they have been trying to run a "1 profile fits all" on the ovens for Alpha 737 and UP78


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