Electronics Forum | Tue Nov 03 06:23:12 EST 2009 | josh_brubaker
Has anyone ever done a tape test to see if the solder resist pulls away from the PCB? Is this an acceptable method for testing solder resist acceptability? This is an issue I am experiencing with our PCBs. I am receiving boards with excess solder o
Electronics Forum | Wed Feb 24 10:23:04 EST 2010 | xps
60° C). Moreover (by IPC standard)... "White residues resulting from no-clean or other processes are acceptable provided the residues from chemistries used have been qualified and documented as benign...". So, use an EDX or IC analysis in order to
Electronics Forum | Fri Mar 19 13:18:03 EDT 2010 | deanm
Regarding your question about buying equipment to vacuum seal the MBBs, according to the IPC/JEDEC standard, "Full air evacuation is not needed or recommended; light air evacuation will reduce the packaging bulk and enhance carton packing. Excessive
Electronics Forum | Wed Mar 24 00:03:20 EDT 2010 | boardhouse
Hi Itzik, it looks like you receive a board from your manufacture that they did solder mask rework on. it looks like they stripped tried to strip the mask off the board. Was this the only board that was like this or did the whole order look like th
Electronics Forum | Wed Mar 24 10:28:51 EDT 2010 | Sean
Hi all, Anyone used to come across solder void underneath mosfet as shown in the attached file? Will this pose any reliability issue, such as get burnt during functional test? How to over come this problem? As far as I know there is no acceptabl
Electronics Forum | Wed Mar 24 11:09:44 EDT 2010 | rajeshwara
Hello Sir I faced the same problem for QFP in DTH product in India. IPC stated that void should not be more than 25% of solder joint. But this type of void definatly create problem during functional test. Please check the folloeing point... 1.Check t
Electronics Forum | Thu Apr 15 10:05:26 EDT 2010 | davef
Why not use the same paste volume as you currently use? Alternately, although we haven't used it in a while, doesn't IPC have a very nice paste volume, aperture calculator that could be used for this? Or is it just a pad size calculator used for
Electronics Forum | Thu Sep 09 05:23:10 EDT 2010 | 15009
You can reduce and almost eliminate voids and other paste related defects in LGA's BGA's, QFN's etc, by using solid solder deposit. Its been around for 24 years, 13 in the US. It is now included in the new IPC 7093 specification for bottom terminat
Electronics Forum | Fri Jan 14 17:03:17 EST 2011 | tombstonesmt
We are currently running a new product with some very tight tolerances while depaneling. We are using a table top 3 axis robot w/ a drill. My question is what is the min/max distance between a component and the edge of the board? I'm having a hard ti
Electronics Forum | Wed Jun 01 01:08:43 EDT 2011 | boardhouse
Hi Aj, for the most part we have gotten away from calling out specific material and instead calling out IPC4101 back slashes to needed requirements. But if you are just looking for what most domestic shops have switch to you would be looking at 370
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