Electronics Forum | Fri May 05 03:11:48 EDT 2000 | M. Rashad Ramzan
Hi, If any one of you guys can tell me the web sight which explains the manufacturing process for multilayer PCBs. Please reply on one of these mail addresses r_ramzan@yahoo.com or mrashad@enabtech.com Rashad
Electronics Forum | Tue Jan 30 10:19:20 EST 2001 | ibi
I think that tolerance of pcb thickness is described in the �1-2-4 of IPC41-01 (Specification for Base Materials for Rigid and Multilayer Printed Boards Supercedes IPC-L-108, L-109, L-112, L-115, AM-361). Good reading,
Electronics Forum | Mon Dec 18 22:36:37 EST 2000 | Charles Harper
The major problems are poor layer to layer bond strength(due to surface tension of most fluoropolymers),and poor cold flow,or dimensional creep of these materials.Please also click on Chapter Author Konsowski,listed above.E-mail form will pop up when
Electronics Forum | Wed Dec 20 10:17:10 EST 2000 | markt
What steps are presently being taken by manufacturers to deal with problems such as layer bond strength, cold flow, and dimensial creep at present? Are there substantial materials research efforts, that you are aware of, in progress that address thes
Electronics Forum | Mon Jan 11 11:23:17 EST 1999 | Bill Copperthwaite
I have an Electrovert UPK 660c fitted with IR preheats top and bottom. We assemble a large range of multilayer backplanes and I was wondering if there are any advantages in changing to convection preheats.Has anybody got any views on the subject.
Electronics Forum | Mon Mar 03 10:33:24 EST 2003 | Ben
We have a customer that is requesting decoupling capacitors, and we are not sure what they are or where to buy them. I know that the customer wants ceramic decaps. Should we just look for multi-layer ceramic capacitors with the rating the customer
Electronics Forum | Wed Jan 21 10:13:14 EST 2004 | ADAM
What is the most effecient form of heating ,ie calrod, IR, convection , or a mixture ? to produce a good thermal profile on a wavesoldering system on thermally challenging multi-layered boards? Thanks Adam
Electronics Forum | Sat Aug 28 11:03:44 EDT 2004 | mariels
We are currently designing a multi-layer board using a BGA with a pitch of 1mm. Need to find out what hole/pad size via and if they should be plated holes? Thanks
Electronics Forum | Fri Sep 03 11:28:18 EDT 2004 | KenF
Fine crack in multi-layer ceramic capacitor (MLCC) may not be detectable by capacitance check.Could anyone out there advise which is the most appropriate method to test/detect fine crack ?
Electronics Forum | Wed Nov 09 10:02:42 EST 2005 | Tim
You should be baking above 100C/212F to ensure that you're driving moisture out of the board. Four hours at 225F is usually enough to dry out most multilayer PWBs.
