Electronics Forum: viewed (Page 5631 of 7894)

Ion exchanger

Electronics Forum | Thu Sep 02 23:14:33 EDT 2004 | KEN

Not sure of what a bench top DI setup would look like. I use 3.5 Cubic foot tanks but have a special application that uses a 1 cubic foot tanks....even then its not a bench top setup. What is clean. No one can tell you. YOu can use IPC TM650 or t

Upgrading PPU computer for AI equipment

Electronics Forum | Thu Sep 02 17:39:21 EDT 2004 | rcanten

I am looking for some help in upgrading my pc that I run PPU software on for my Universal AI equipment. I have installed PPU on a 840mhz pc and everything works fine except I can not transfer programs from the pc to the uicp. The error I get is buffe

MLCC crack detection

Electronics Forum | Fri Sep 03 11:45:15 EDT 2004 | rlackey

Hi Ken, I know this doesn't help in the immediate timescale, but isn't avoidance the best form? can you trace the cracking to a process issue (Solder profile, shock damage, handling damage, probe/ATE damage)or a chip cap manufacturing fault? I can'

measument of paste thickness after Screen Printing

Electronics Forum | Wed Sep 08 16:21:41 EDT 2004 | rohman23

I'm in a similar situation. We have a pre-historic semi-automatic printer that does a decent job, but would like to get an automatic printer. I've only just begun looking into the different options available, but would like one that could inspect t

Component location related to Fiducial marks

Electronics Forum | Tue Sep 07 10:05:33 EDT 2004 | russ

Components do not have to be in the framework of the fiducials. It is recommended that the fiducials are at the outer extremeties in at least 3 corners of the assembly however. It is also a good idea to keep a minimum "keepout" area around them of

Component location related to Fiducial marks

Electronics Forum | Wed Sep 08 20:48:28 EDT 2004 | Darby

Yes I agree with Russ about someone asking up front and everything else. Two tips. 1. Keep the marks at least 5mm in from the conveyor edges of the pcb so that clamping systems do not hide the mark. 2. Make sure the marks are eccentric around the pcb

Component location related to Fiducial marks

Electronics Forum | Fri Sep 10 00:13:48 EDT 2004 | Darren

Joe If you are building these yourself your engineering group should be able to answer your questions, if you will be using a CM they will usually have a basic DFM report which they will gladly give to you as it will make their job much easier if yo

Bare PCB reflow

Electronics Forum | Mon Sep 06 20:18:37 EDT 2004 | charly

hi, we are running high mixed low volume here, and i encounter many pcb delam after reflow issue. here some doubt need ur advise: 1. actually, what is max temperature and duration can a bare PCB reflow without any quality problem? if i allow bare

BGA Solderability Standard

Electronics Forum | Tue Sep 07 15:11:35 EDT 2004 | Dreamsniper

It's been a while since BGA usage become widespread. Ton's of articles had been written with regards to design, processing, techniques, inspection etc...but it seems like there's still no hard ground for standards and IPC 7095 doesn't cover everythin

Chipmounter Placement Speed

Electronics Forum | Tue Sep 07 21:30:24 EDT 2004 | peter016

I would like to know what are the achievable chip placement per hour for the following chipmounter models. 1. Siemens HS50 (Spec at 50,000 chips per hour) 2. Siemens Siplace S20 3. Fuji CP 642 4. Sanyo TCM1050 5. Universal HSP4975(re-badge of TCM3000


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