Electronics Forum | Wed Oct 07 15:25:02 EDT 1998 | Joe P.
Hi Everybody | | Is anyone aware of the possible causes that may lead to voids in the solder bumps after assembly. We assembled some dice on thin substrates and after assembly, void formation in the solder bumps were observed. | We have alread
Electronics Forum | Fri May 02 09:37:23 EDT 2003 | Jerry Magera
Via in pad is the most efficient use of space. Blind via seems to be blamed for this. Cross-sections (send me some) will probably show a void still existing in the via or spherical voids aligned near the component pad side. One can estimate the vo
Electronics Forum | Wed May 07 08:10:22 EDT 2003 | Pon
Hi all Are there any advice pls. let me know. Our customer Void spec. at BGA and CSP is less than 10%. Usually we found void defect at BGA and CSP component around 2-3 % but sone lot the defect rate is up to 18%. I have read some input from this w
Electronics Forum | Thu Oct 26 11:49:54 EDT 2006 | sms_don
CW, The good news is that you are not trying to use SAC paste with SnPb balls for that would be a void generator due to the ball being liquidous while the SAC paste is still in a flux cleaning stage. Two points to consider: One, voids are not an i
Electronics Forum | Sun Aug 19 15:34:20 EDT 2007 | davef
What are you trying to do: * Improve hole fill? * Reduce PTH voiding? Hole fill: Search the fine SMTnet Archives for stuff like: http://www.smtnet.com/forums/Index.cfm?CFApp=1&Message_ID=36063 PTH voiding: Ideally, there are no voids. We're unawar
Electronics Forum | Thu Jun 28 17:05:46 EDT 2012 | davef
Here’s what we seem to know: * There’s a problem with voiding in the solder connections of SMT capacitors * A void is an open area caused by air or process fluid that is trapped within a solder connection * Voids are an allowable condition as long as
Electronics Forum | Thu May 30 09:33:15 EDT 2019 | emeto
Contributors in order of importance: 1. PCB design - if you have large thermal pads, a grid of via holes should be created. Components with low profile will not let the gas to escape from the joint. The only way is going down. 2. Reduce paste volum
Electronics Forum | Fri May 21 14:22:56 EDT 1999 | Dave F
| Dave, | i tried reflowing bare boards with only solder printed on em and no component placed. we still got voids as same as when components were placed. so atleast one of that theories(voids due to component/component placement)could be considered
Electronics Forum | Thu Nov 21 06:36:30 EST 2002 | Ben
I'm doing SMT of lead-free solder BGA on FR4 Ni-Au PCB. The solder paste I'm using is Sn/Ag/Cu and reflow with peak temp at 240C. I found there are voids(1-2) in almost every solder joint(500 micron in dia) under xray. And the void size is violate th
Electronics Forum | Thu Apr 17 10:38:02 EDT 2003 | davef
While Russ is correct that a little voiding is OK, your level of voiding [customer complains that the solder surface looks bumpy] doesn't give us the ol' warm and fuzzy about their process control. For background: * Search the fine SMTnet Archives.
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