Electronics Manufacturing Technical Articles

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1857 SMT / PCB Assembly Related Technical Articles

Aluminum Soldering - Product Guide

Jul 29, 2020 | Superior Flux and Mfg. Co.

Aluminum is a metal that it is hard to solder due to the high surface tension difference between it and molten solder alloy. This occurs because aluminum rapidly forms a tenacious oxide layer whenever it is exposed to oxygen in the air. The oxide layer is responsible for the high surface tension difference between the aluminum and the solder and impedes the solder from spreading evenly on an aluminum surface. There are hundreds of aluminum alloys available in the marketplace; it is important to identify the form of aluminum that is being soldered. Once this is done, an appropriate soldering technique can be chosen for soldering the specific aluminum alloy under consideration. Direct aluminum soldering eliminates using expensive plating techniques to prepare the aluminum surface for soldering....

Publisher: Superior Flux & Mfg. Co.

Superior Flux & Mfg. Co.

Manufactures environmentally friendly fluxes.

Cleveland, OH,

Manufacturer

Surface Treatment Enabling Low Temperature Soldering to Aluminum

Jul 29, 2020 | Divyakant Kadiwala

The majority of flexible circuits are made by patterning copper metal that is laminated to a flexible substrate, which is usually polyimide film of varying thickness. An increasingly popular method to meet the need for lower cost circuitry is the use of aluminum on Polyester (Al-PET) substrates. This material is gaining popularity and has found wide use in RFID tags, low cost LED lighting and other single-layer circuits. However, both aluminum and PET have their own constraints and require special processing to make finished circuits. Aluminum is not easy to solder components to at low temperatures and PET cannot withstand high temperatures. Soldering to these materials requires either an additional surface treatment or the use of conductive epoxy to attach components. Surface treatment of aluminum includes the likes of Electroless Nickel Immersion Gold plating (ENIG), which is extensive wet-chemistry and cost-prohibitive for mass adoption. Conductive adhesives, including Anisotropic Conductive Paste (ACP), are another alternate to soldering components. These result in component substrate interfaces that are inferior to conventional solders in terms of performance and reliability. An advanced surface treatment technology will be presented that addresses all these constraints. Once applied on Aluminum surfaces using conventional printing techniques such as screen, stencil, etc., it is cured thermally in a convection oven at low temperatures. This surface treatment is non-conductive. To attach a component, a solder bump on the component or solder printed on the treated pad is needed before placing the component. The Aluminum circuit will pass through a reflow oven, as is commonly done in PCB manufacturing. This allows for the formation of a true metal to metal bond between the solder and the aluminum on the pads. This process paves the way for large scale, low cost manufacturing of Al-PET circuits. We will also discuss details of the process used to make functional aluminum circuits, study the resultant solder-aluminum bond, shear results and SEM/ EDS analysis....

Publisher: Averatek Corporation

Averatek Corporation

Averatek Corporation is a high tech company based in Santa Clara, CA that provides custom design services and patterned circuit board materials manufactured through the use of an innovative, proprietary process.

Santa Clara, California, USA

Manufacturer

Impact of Assembly Cycles on Copper Wrap Plating

Jul 22, 2020 | Hardeep Heer, Ryan Wong, et al

The PWB industry needs to complete reliability testing in order to define the minimum copper wrap plating thickness requirement for confirming the reliability of PTH structures. Predicting reliability must ensure that the failure mechanism is demonstrated as a wear-out failure mode because a plating wrap failure is unpredictable. The purpose of this study was to quantify the effects of various copper wrap plating thicknesses through IST testing followed by micro sectioning to determine the failure mechanism and identify the minimum copper wrap thickness required for a reliable PWB. Minimum copper wrap plating thickness has become an even a bigger concern since designers started designing HDI products with buried vias, microvias and through filled vias all in one design. PWBs go through multiple plating cycles requiring planarization after each plating cycle to keep the surface copper to a manageable thickness for etching. The companies started a project to study the relationship between Copper wrap plating thickness and via reliability. The project had two phases. This paper will present findings from both Phase 1 and Phase 2....

Publisher: Firan Technology Group

Firan Technology Group

FTG is a leading North American manufacturer of high technology printed circuit boards and precision illuminated display systems.

Toronto, Ontario, Canada

Consultant / Service Provider, Manufacturer

Soft, Wireless Periocular Wearable Electronics For Real-Time Detection Of Eye Vergence In A Virtual Reality Toward Mobile Eye Therapies

Jul 22, 2020 | Saswat Mishra et al

Recent advancements in electronic packaging and image processing techniques have opened the possibility for optics-based portable eye tracking approaches, but technical and safety hurdles limit safe implementation toward wearable applications. Here, we introduce a fully wearable, wireless soft electronic system that offers a portable, highly sensitive tracking of eye movements (vergence) via the combination of skin-conformal sensors and a virtual reality system. Advancement of material processing and printing technologies based on aerosol jet printing enables reliable manufacturing of skin-like sensors, while the flexible hybrid circuit based on elastomer and chip integration allows comfortable integration with a user's head. Analytical and computational study of a data classification algorithm provides a highly accurate tool for real-time detection and classification of ocular motions. In vivo demonstration with 14 human subjects captures the potential of the wearable electronics as a portable therapy system, whose minimized form factor facilitates seamless interplay with traditional wearable hardware....

Publisher: Georgia Institute of Technology

Georgia Institute of Technology

Center for Board Assembly Research CBAR- advanced research on board assembly processes and systems

Atlanta, Georgia, USA

Research Institute / Laboratory / School

Via Filling Applications in Practice

Jul 15, 2020 | Stefan Keller

Via Filling • Through Hole Vias - IPC-4761 – Plugging – Filling – Filled & Capped • MicroviaFilling and Stacked Vias...

Publisher: Würth Elektronik GmbH & Co. KG

Würth Elektronik GmbH & Co. KG

We produce circuit boards from your specifications in various designs.

Niedernhall, Germany

Consultant / Service Provider, Manufacturer

Via In Pad - Conductive Fill or Non-Conductive Fill?

Jul 15, 2020 | Tech Talk for Techies

In the early 2000s the first fine-pitch ball grid array devices became popular with designers looking to pack as much horsepower into as small a space as possible. "Smaller is better" became the rule and with that the mechanical drilling world became severely impacted by available drill bit sizes, aspect ratios, and plating methodologies. First of all, the diameter of the drill needed to be in the 0.006" or smaller range due to the reduction of pad size and spacing pitch. Secondly, the aspect ratio (depth to diameter) became limited by drill flute length, positional accuracy, rigidity of the tools (to prevent breakage), and the throwing power of acid copper plating systems. And lastly, the plating needed to close up the hole as much as possible, which led to problems with voiding, incomplete fill, and gas/solution entrapment....

Publisher: Advanced Circuits

Advanced Circuits

One-Stop Solution for PCB & Prototype Assembly Expanded PCB manufacturing capabilities to support advanced designs with demanding requirements including laser-drilled microvias, cavity boards, heavy copper up to 20 oz., via-in-pad

Aurora, Colorado, USA

Manufacturer

Creating Reusable Manufacturing Tests for High-Speed I/O with Synthetic Instruments

Jul 08, 2020 | Louis Y. Ungar, Neil G. Jacobson, T.M. Mak

There is a compelling need for functional testing of high-speed input/output signals on circuit boards ranging from 1 gigabit per second (Gbps) to several hundred Gbps. While manufacturing tests such as Automatic Optical Inspection (AOI) and In-Circuit Test (ICT) are useful in identifying catastrophic defects, most high-speed signals require more scrutiny for failure modes that arise due to high-speed conditions, such as jitter. Functional ATE is seldom fast enough to measure high-speed signals and interpret results automatically. Additionally, to measure these adverse effects it is necessary to have the tester connections very close to the unit under test (UUT) as lead wires connecting the instruments can distort the signal. The solution we describe here involves the use of a field programmable gate array (FPGA) to implement the test instrument called a synthetic instrument (SI). SIs can be designed using VHDL or Verilog descriptions and "synthesized" into an FPGA. A variety of general-purpose instruments, such as signal generators, voltmeters, waveform analyzers can thus be synthesized, but the FPGA approach need not be limited to instruments with traditional instrument equivalents. Rather, more complex and peculiar test functions that pertain to high-speed I/O applications, such as bit error rate tests, SerDes tests, even USB 3.0 (running at 5 Gbps) protocol tests can be programmed and synthesized within an FPGA. By using specific-purpose test mechanisms for high-speed I/O the test engineer can reduce test development time. The synthetic instruments as well as the tests themselves can find applications in several UUTs. In some cases, the same test can be reused without any alteration. For example, a USB 3.0 bus is ubiquitous, and a test aimed at fault detection and diagnoses can be used as part of the test of any UUT that uses this bus. Additionally, parts of the test set may be reused for testing another high-speed I/O. It is reasonable to utilize some of the test routines used in a USB 3.0 test, in the development of a USB 3.1 (running at 10 Gbps), even if the latter has substantial differences in protocol. Many of the SI developed for one protocol can be reused as is, while other SIs may need to undergo modifications before reuse. The modifications will likely take less time and effort than starting from scratch. This paper illustrates an example of high-speed I/O testing, generalizes failure modes that are likely to occur in high-speed I/O, and offers a strategy for testing them with SIs within FPGAs. This strategy offers several advantages besides reusability, including tester proximity to the UUT, test modularization, standardization approaching an ATE-agnostic test development process, overcoming physical limitations of general-purpose test instruments, and utilization of specific-purpose test instruments. Additionally, test instrument obsolescence can be overcome by upgrading to ever-faster and larger FPGAs without losing any previously developed design effort. With SIs and tests scalable and upward compatible, the test engineer need not start test development for high-speed I/O from scratch, which will substantially reduce time and effort....

Publisher: A.T.E. Solutions, Inc.

A.T.E. Solutions, Inc.

The leading Test, ATE and Testability consulting and educational firm, offering various test related courses. Maintains the BestTest Directory, a test community knowledge base. Publishes The BestTest eNewsletter.

Los Angeles, California, USA

Consultant / Service Provider, Manufacturer, Training Provider

Using Rheology Measurement As A Potentially Predictive Tool For Solder Paste Transfer Efficiency And Print Volume Consistency

Jul 02, 2020 | Mitch Holtzer, Karen Tellefsen and Westin Bent

Industry standards such as J-STD-005 and JIS Z 3284-1994 call for the use of viscosity measurement(s) as a quality assurance test method for solder paste. Almost all solder paste produced and sold use a viscosity range at a single shear rate as part of the pass-fail criteria for shipment and customer acceptance respectively. As had been reported many times, an estimated 80% of the defects associated with the surface mount technology process involve defects created during the printing process. Viscosity at a single shear rate could predict a fatal flaw in the printability of a solder paste sample. However, false positive single shear rate viscosity readings are not unknown....

Publisher: Alpha Assembly Solutions

Alpha Assembly Solutions

Alpha Assembly Solutions is a world leader in the development, manufacturing, and sales of innovative materials used in the assembly electronics, industrial joining and Photo Voltaic market places.

South Plainfield, New Jersey, USA

Manufacturer

101 EMI Shielding Tips and Tricks

Jul 02, 2020 | Holland Shielding Systems BV

Principle of shielding 1 The principle of shielding is creating a conductive layer completely surrounding the object you want to shield. This was invented by Michael Faraday and this system is known as a Faraday Cage. 2 Ideally, the shielding layer will be made up of conductive sheets or layers of metal that are connected by means of welding or soldering, without any interruptions. The shielding is perfect when there is no difference in conductivity between the used materials. When dealing with frequencies below 30 MHz, the metal thickness affects shielding effectiveness. We also offer a range of shielding methods for plastic enclosures. A complete absence of interruptions is not a realistic goal since the Faraday cage will have to be opened from time to time so electronics, equipment or people can be moved in or out. Openings are also needed for displays, ventilation, cooling, power supply, signals etc. 3 Shielding works in both directions, items inside the shielded room are shielded from outside influences. (Fig. 3.1)...

Publisher: Holland Shielding Systems BV

Holland Shielding Systems BV

Worldwide leading manufacturer of EMC (electromagnetic compatibility), EMI (electromagnetic interference), RFI (radio frequency interference), & EMP (electromagnetic pulse) shielding solutions. Our EMC experts will work ...

Dordrecht, Netherlands

Other

A PROCEDURE TO DETERMINE HEAD-IN-PILLOW DEFECT AND ANALYSIS OF CONTRIBUTING FACTORS

Jul 02, 2020 | Ranjit Pandher, Rahul Raut, Michael Liberatore, Navendra Jodhan, and Karen Tellefsen

Head-in-Pillow (HIP) defects are a growing concern in the electronics industry. These defects are usually believed to be the result of several factors, individually or in combination. Some of the major contributing factors include: surface quality of the BGA spheres, activity of the paste flux, improper placement / misalignment of the components, a non-optimal reflow profile, and warpage of the components. To understand the role of each of these factors in producing head-in-pillow defects and to find ways to mitigate them, we have developed two in-house tests....

Publisher: Cookson Electronics

Cookson Electronics

Leading materials science company that provides high performance materials, chemistry and technology solutions to the electronics and surface finishing industries worldwide.

Lakeville, Minnesota, USA

Manufacturer

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