Electronics Manufacturing Technical Articles

PCB Sourcing Using PCQR 2

Dec 13, 2017 | Al Block, Naji Norder, Chris Joran

In a global market, it is often difficult to determine the best PCB suppliers for your technology needs, while also a chieving the lowest costs for your products. Considering each PCB supplier has their own niche in t erms of equipment, process, and performance, uniform test data from the IPC -9151D Process Capability, Quality, and Relative Reliability (PCQR 2 ) Benchmark Test Standard can help find the right source for the board based on its specific technology requirements. By using a data-based approach to vendor selection, this can remove the subjective nature of sourcing, reduce the need for PCB process experts to map suppliers into technologies, and eliminate irrational sourcing decisions....

Publisher: National Instruments

Cost effective solution in SMT production: AI and Big Data

Dec 12, 2017 | Alexei Shkolnik (Proventus Technologies)

In recent years, more and more companies with SMT production floor are trying to become more efficient and cut production costs. In most cases, the treatment was carried out problematic processes that visible and easy to find. Now these companies came to look problematic processes that are invisible and hard to find....

Publisher: Proventus Technologies

Contamination Profile of Printed Circuit Board Assemblies in Relation to Soldering Types and Conformal Coating

Dec 11, 2017 | Hélène Conseil, Morten S. Jellesen, Rajan Ambat

Typical printed circuit board assemblies (PCBAs) processed by reflow, wave, or selective wave soldering were analysed for typical levels of process related residues, resulting from a specific or combination of soldering process. Typical solder flux residue distribution pattern, composition, and concentration are profiled and reported. Presence of localized flux residues were visualized using a commercial Residue RAT gel test and chemical structure was identified by FT-IR, while the concentration was measured using ion chromatography, and the electrical properties of the extracts were determined by measuring the leak current using a twin platinum electrode setup. Localized extraction of residue was carried out using a commercial C3 extraction system. Results clearly show that the amount and distribution of flux residues are a function of the soldering process, and the level can be reduced by an appropriate cleaning. Selective soldering process generates significantly higher levels of residues compared to the wave and reflow process. For conformal coated PCBAs, the contamination levels generated from the tested wave and selective soldering process are found to be enough to generate blisters under exposure to high humidity levels....

Publisher: Technical University of Denmark

Utility of Dual Applicators for Non-Atomized Conformal Coating to Improve High-Volume Manufacturing Optimization

Dec 07, 2017 | Camille Sybert, Michael Szuch

Electronics manufacturers protect their circuit boards with conformal coatings. Conformal coatings serve as a barrier from environmental hazards and internal shorts, tin whiskers, and corrosion at the board level. Within conformal coatings different material chemistries specialize in shielding from an array of hazards and can be applied by multiple methods. The most common method is atomized spray which disperses the material into a fine mist. Alternatively, non-atomized coating controls the materials' dispense shape while maintaining the original liquid form. While some applications demand atomized spray and other scenarios overlap between atomized and non-atomized coating, this paper focuses on the circumstances where materials are ideally suited for non-atomized, selective coating....

Publisher: Nordson ASYMTEK

Guide to Light-Cure Conformal Coating

Nov 30, 2017 | Dymax Corporation

Each year the electronics industry is faced with new product designs that call for smaller printed circuit boards (PCBs) to function in more aggressive and rigorous service environments. As demands change, conformal coating is becoming increasingly adopted to ensure PCB reliability in environments where moisture, condensation, dust, dirt, salts, chemicals, abrasion, thermal shock, mechanical shock, and other factors can all affect circuit performance. This guide reviews the benefits of using light-cure conformal coatings as well as cost justification, typical processing guidelines and best practices, product selection criteria, data, and industry specifications. ...

Publisher: Dymax Corporation

Factors Affecting the Adhesion of Thin Film Copper on Polyimide

Nov 22, 2017 | David Ciufo, Hsin-Yi Tsai and Michael J. Carmody

The use of copper foils laminated to polyimide (PI) as flexible printed circuit board precursor is a standard practice in the PCB industry. We have previously described[1] an approach to very thin copper laminates of coating uniform layers of nano copper inks and converting them into conductive foils via photonic sintering with a multibulb conveyor system, which is consistent with roll-to-roll manufacturing. The copper thickness of these foils can be augmented by electroplating. Very thin copper layers enable etching fine lines in the flexible circuit. These films must adhere tenaciously to the polyimide substrate.

In this paper, we investigate the factors which improve and inhibit adhesion. It was found that the ink composition, photonic sintering conditions, substrate pretreatment, and the inclusion of layers (metal and organic) intermediate between the copper and the polyimide are important....

Publisher: Intrinsiq Materials Inc.

Controlling Voiding Mechanisms in the Reflow Soldering Process

Nov 15, 2017 | Keith Sweatman, Takatoshi Nishimura, Kenichiro Sugimoto, Akira Kita

While a significant level of voiding can be tolerated in solder joints where electrical conductivity is the main requirement, voiding at any level severely compromises thermal conductivity. For example, in LED lighting modules effective conduction of heat through the 1st level die attach to the substrate and then through the 2nd level attach to the heat sink is critical to performance so that voiding in the solder joints at both levels must be minimized. (...) In this paper, the authors will review the factors that influence the incidence of voids in small and large area solder joints that simulate, respectively, the 1st and 2nd level joints in LED modules and discuss mitigation strategies appropriate to each level. They will also report the results of a study on the effect on the incidence of voids of flux medium formulation and the optimization of the thermal profile to ensure that most of the volatiles are released early in the reflow process....

Publisher: Nihon Superior Co., Ltd.

Why Design PCB Assemblies with Testing in Mind?

Nov 14, 2017 | Tuan Tran

Can you put a product that hasn't been fully tested on the market? When it comes to Printed Circuit Board (PCB) assembly and manufacturing, most firms’ answer is neither a strict yes or no. ...

Publisher: Power Design Services

Soldering fume in electronics manufacturing - damaging effects and solutions for removal

Nov 10, 2017 | ULT AG

Modern electronics manufacturing is made up by a multiplicity of different separation and joining processes, with the later surely taking the vast majority of production technology. Alongside gluing, welding and laser processes, soldering still holds a primary position in electronic assemblies. However, soldering does not always equal soldering, because there are quite a lot of different soldering technologies. Accordingly, you have to distinguish between automated and manual soldering procedures. No matter which soldering process you analyse, all of them have one aspect in common: they produce airborne pollutants, which may have a negative impact on employees, plants and products as well....

Publisher: ULT LLC

Void Reduction in Reflow Soldering Processes by Sweep Stimulation of PCB Substrate

Nov 08, 2017 | Viktoria Rawinski

Due to the ongoing trend towards miniaturization of power components, the need for increased thermal conductivity of solder joints in SMT processes gains more and more importance. Therefore, the role of void free solder joints in power electronics becomes more central. Voids developed during soldering reduce the actual thermal transfer and can cause thermal damage of the power components up to their failure. For this reason, the company has developed a new technique to minimize the formation of these voids during the soldering process....

Publisher: kurtz ersa Corporation

Solder Paste Printing – the Most Critical Part of Building a Quality PCB Explained

Nov 03, 2017 | Tuan Tran

If someone were to ask what the most important part of their favorite electronic device is, they are likely to point to the printed circuit board (PCB) responsible for making the device work before moving on to other components. From large motherboards to tiny chips, most of the technology that retail consumers take for granted comes down to a properly installed and calibrated PCB. ...

Publisher: Power Design Services

Just‐In‐Time Material Management for the PCB Industry

Nov 03, 2017 | Tuan Tran

As with any production industry, businesses in the PCB industry need to maintain a healthy balance between the components they keep in stock and those they use for meet client orders. Ordering too many components comes with serious disadvantages, as does not ordering enough, and PCB manufacturers need to stay as close as possible to a happy medium between the two....

Publisher: Power Design Services

21st Century PCB FAB Factory Design Which Eliminates Regional Cost Advantages

Nov 01, 2017 | Alexander Stepinski

Over fifteen years has passed since North America and Europe ceased being the center of worldwide PCB fabrication, and were supplanted by a Far East market with low cost labor, more relaxed environmental requirements, and strong government support. In just a few short years, the superior cost advantages of this new dynamic put volume PCB production in the West out of business, aside for the military and specialty technology applications contained in the few shops that continue to exist today.

Recently, however, the conditions which created the current equilibrium appear to be shifting again. In this new dynamic, automation, innovative green wastewater technologies, and next generation process equipment innovations have combined to make new factories capable of achieving rapid ROI for PCB fabrication almost anywhere. This paper means to illustrate this new dynamic, and provide case study examples from the new greenfield installation at the company captive facility in New Hampshire....

Publisher: Whelen Engineering

Can Nano-Coatings Really Improve Stencil Performance?

Oct 26, 2017 | Tony Lentz

Nano-coatings have been introduced by various manufacturers, with the promise of addressing some of the challenges relative to solder paste printing. Stated benefits include: Reduced underside cleaning, reduced bridging, improved solder paste release and improvements in yield. With several nano technologies already on the market and more likely to be introduced, how can the performance be quantified? How robust are these coatings? How can an assembler approach the ROI of these coatings? What hidden benefits or negative impacts should be considered?

This paper will present a rigorous method for evaluating the performance and economic benefits of solder paste stencil nano-coatings....

Publisher: FCT ASSEMBLY, INC.

To Quantify a Wetting Balance Curve

Oct 19, 2017 | Frank Xu Ph.D., Robert Farrell, Rita Mohanty Ph.D.

Wetting balance testing has been an industry standard for evaluating the solderability of surface finishes on printed circuit boards (PCB) for many years. A Wetting Balance Curve showing Force as a function of Time, along with the individual data outputs "Time to Zero" T(0), "Time to Two-Thirds Maximum Force" T(2/3), and "Maximum Force" F(max) are usually used to evaluate the solderability performance of various surface finishes. While a visual interpretation of the full curve is a quick way to compare various test results, this method is subjective and does not lend itself readily to a rigorous statistical evaluation. Therefore, very often, when a statistical evaluation is desired for comparing the solderability between different surface finishes or different test conditions, one of the individual parameters is chosen for convenience. However, focusing on a single output usually doesn't provide a complete picture of the solderability of the surface finish being evaluated.

In this paper, various models here-in labeled as "point" and "area" models are generated using the three most commonly evaluated individual outputs T(0), T(2/3), and F(max). These models have been studied to quantify how well each describes the full wetting balance curve. The solderability score (S-Score) with ranking from 0 to 10 were given to quantify the wetting balance curve as the result of the model study, which corresponds well with experimental results....

Publisher: Enthone

High Reliability and High Temperature Application Solution - Solder Joint Encapsulant Paste

Oct 16, 2017 | Dr. Mary Liu and Dr. Wusheng Yin

The miniaturization and advancement of electronic devices have been the driving force of design, research and development, and manufacturing in the electronic industry. However, there are some issues occurred associated with the miniaturization, for examples, warpage and reliability issues. In order to resolve these issues, a lot of research and development have been conducted in the industry and university with the target of moderate melting temperature solder alloys such as m.p. 280°C. These moderate temperature alloys have not resolve these issues yet due to the various limitations. YINCAE has been working on research and development of the materials with lower temperature soldering for higher temperature application. To meet this demand, YINCAE has developed solder joint encapsulant paste to enhance solder joint strength resulting in improving drop and thermal cycling performance to eliminate underfilling, edge bonding or corner bonding process in the board level assembly process. This solder joint encapsulant paste can be used in typical lead-free profile and after reflow the application temperature can be up to over 300C, therefore it also eliminates red glue for double side reflow process. In this paper, we will discuss the reliability such as strength of solder joints, drop test performance and thermal cycling performance using this solder joint encapsulant paste in detail. ...

Publisher: YINCAE Advanced Materials, LLC.

Mitigation of Pure Tin Risk by Tin-Lead SMT Reflow- Results of an Industry Round-Robin

Oct 12, 2017 | David Pinsky - Raytheon Integrated Defense Systems, Tom Hester - Raytheon Space and Airborne Systems, Dr. Anduin Touw - The Boeing Company, Dave Hillman - Rockwell Collins

The risk associated with whisker growth from pure tin solderable terminations is fully mitigated when all of the pure tin is dissolved into tin-lead solder during SMT reflow. In order to take full advantage of this phenomenon, it is necessary to understand the conditions under which such coverage can be assured. A round robin study has been performed by IPC Task group 8-81f, during which identical sets of test vehicles were assembled at multiple locations, in accordance with IPC J-STD-001, Class 3. All of the test vehicles were analyzed to determine the extent of complete tin dissolution on a variety of component types. Results of this study are presented together with relevant conclusions and recommendations to guide high reliability end-users on the applicability and limitations of this mitigation strategy....

Publisher: Raytheon

Intermetallic Compounds In Solar Cell Interconnections Including Lead-Free, Low Melting Point Solders

Oct 05, 2017 | Torsten Geipel, Achim Kraft, Ulrich Eitner - ISE, Monja Moeller - Kiel University

Intermetallic compounds (IMC) in solder bonds are commonly considered critical for the reliability of interconnections. The microstructure and thermal aging characteristics of solder bonds of crystalline silicon solar cells are investigated, whereby two solders, Sn60Pb40 and a lead-free, low melting point alternative Sn41Bi57Ag2 are considered....

Publisher: Fraunhofer Insitute for Solar Energy Systems ISE

An Investigation into the Use of Nano-Coated Stencils to Improve Solder Paste Printing with Small Stencil Aperture Area Ratios

Sep 28, 2017 | Jasbir Bath, Tony Lentz, Greg Smith

These nano-coatings also refine the solder paste brick shape giving improved print definition. These two benefits combine to help the solder paste printing process produce an adequate amount of solder paste in the correct position on the circuit board pads. Today, stencil aperture area ratios from 0.66 down to 0.40 are commonly used and make paste printing a challenge.

This paper presents data on small area ratio printing for component designs including 01005 Imperial (0402 metric) and smaller 03015 metric and 0201 metric chip components and 0.3 mm and 0.4 mm pitch micro BGAs....

Publisher: FCT ASSEMBLY, INC.

Flex Circuit Manufacturing for Innovative Product Design

Sep 27, 2017 | Tuan Tran

Flex and rigid flex circuits have become increasingly popular in the high-density electronics industry for their cost-saving three-dimensional configurations. The ability to build circuitry to fit the device instead of the other way around, offers significant advantages for complex aerospace, military, and medical device applications....

Publisher: Power Design Services

Laser Wire Stripping for Medical Device Manufacturing Applications

Sep 25, 2017 | Pete Doyon, VP, Product Management, Schleuniger, Inc.

Laser wire stripping was developed by NASA in the 1970s as part of the Space Shuttle program. The technology made it possible to use smaller sized wires with thinner insulations, without risk of the damage that can be caused by traditional mechanical wire stripping methods. Laser wire stripping technology was commercialized in the 1990s and was initially used for aerospace and defense applications. Laser wire stripping then grew significantly when the consumer electronics market exploded as lasers became the only stripping solution for the tiny data cables found in laptops, mobile phones and other consumer electronics products. Another large industry that has adopted laser wire stripping methods, and for good reason, is high-end medical device manufacturing. ...

Publisher: Schleuniger, Inc.

2.5D and 3D Semiconductor Package Technology: Evolution and Innovation

Sep 14, 2017 | Vern Solberg

The electronics industry is experiencing a renaissance in semiconductor package technology. A growing number of innovative 3D package assembly methodologies have evolved to enable the electronics industry to maximize their products functionality. By integrating multiple die elements within a single package outline, product boards can be made significantly smaller than their forerunners and the shorter interconnect resulting from this effort has contributed to improving both electrical performance and functional capability. (...)

This paper outlines both positive and negative aspects of current 3D package innovations and addresses the challenges facing adopters of silicon and glass based interposer fabrication. The material presented will also reference 3D packaging standards and recognize innovative technologies from a number of industry sources, roadmaps and market forecasts....

Publisher: Vern Solberg - Solberg Technical Consulting

The Relationship Between Energy-Resource Depletion, Climate Change, Health Resources and the Environmental Kuznets Curve: Evidence From the Panel of Selected Developed Countries

Sep 13, 2017 | Syed Abdu lRehman Khan, Khalid Zaman, YuZhang

The objective of the study is to examine the relationship between energy-resource depletion, climate change, health resources and the Environmental Kuznets Curve(EKC) under the financial constraint environment in the panel of selected developed countries, over the period of 2000–2013....

Publisher: Changan University

Challenges on ENEPIG Finished PCBs: Gold Ball Bonding and Pad Metal Lift

Sep 07, 2017 | Young K. Song and Vanja Bukva

As a surface finish for PCBs, Electroless Nickel/Electroless Palladium/Immersion Gold (ENEPIG) was selected over Electroless Nickel/Immersion Gold (ENIG) for CMOS image sensor applications with both surface mount technology (SMT) and gold ball bonding processes in mind based on the research available on-line. Challenges in the wire bonding process on ENEPIG with regards to bondability and other plating related issues are summarized....

Publisher: Teledyne DALSA

NSOP Reduction for QFN RFIC Packages

Aug 31, 2017 | Mumtaz Y. Bora

Wire bonded packages using conventional copper leadframe have been used in industry for quite some time. The growth of portable and wireless products is driving the miniaturization of packages resulting in the development of many types of thin form factor packages and cost effective assembly processes. Proper optimization of wire bond parameters and machine settings are essential for good yields.

Wire bond process can generate a variety of defects such as lifted bond, cracked metallization, poor intermetallic etc. NSOP – non-stick on pad is a defect in wire bonding which can affect front end assembly yields. In this condition, the imprint of the bond is left on the bond pad without the wire being attached. NSOP failures are costly as the entire device is rejected if there is one such failure on any bond pad. The paper presents some of the failure modes observed and the efforts to address NSOP reduction...

Publisher: Peregrine Semiconductor

The Importance of On‐Site Training for PCB Assembly

Aug 28, 2017 | Tuan Tran

If there is one way to guarantee world-class results in the electronics industry, it's by ensuring factory floor technicians enjoy consistent, regular training. Regular training ensures that assembly line technicians use standardized methods, generating efficiencies and improving the assembly process....

Publisher: Power Design Services

How Does 3D AOI Increase Manufacturing Quality?

Aug 28, 2017 | Tuan Tran

PCB suppliers in the automotive space are vastly accelerating their time to market by using automated optical inspection (AOI) systems during PCB assembly. However, this next-generation technique is not limited in scope to the automotive industry – it has powerful implications for the entire PCB industry....

Publisher: Power Design Services

Why Use a California PCB Assembly Company?

Aug 25, 2017 | Tuan Tran

High Quality Solutions to Reduce Manufacturing Costs and Time...

Publisher: Power Design Services

Development of Halogen Free, Low Loss Copper-Clad Laminates Containing a Novel Phosphonate Oligomer

Aug 24, 2017 | Dr. Lawino Kagumba - FRX Polymers Inc., Yang Zhong Qiang, Huang Tian Hui, You Jiang, Douglas Sober - Shengyi Technology Co., Ltd.

With the rapid development of the information industry, increasing attention is being paid to the dielectric performance of base materials including copper-clad laminates (CCL) and prepregs. In addition to the increasingly high performance requirements of CCL's, the present global attention to less toxic products is leading to an increase in the use of halogen-free flame retardants in electronics. (...)

This paper introduces a new phosphonate oligomer which can be used as a reactive flame retardant in epoxy based resin systems. Suitable conditions for the complete reaction between the phosphonate oligomer and epoxy resin are described and the resulting halogen-free laminates with improved properties such as low Df, low coefficient of thermal expansion (CTE), high peel strength, and good toughness are presented....

Publisher: FRX Polymers Inc.

A Novel Solution for No-Clean Flux not Fully Dried under Component Terminations

Aug 17, 2017 | Dr. Ning-Cheng Lee & Fen Chen

At SMT assembly, flux outgassing/drying is difficult for devices with poor venting channel, and resulted in insufficiently dried/burnt-off flux residue for no-clean process.

Examples including:

• Large low stand-off components such as QFN, LGA
• Components covered under electromagnetic shield which has either no or few venting holes
• Components assembled within cavity of board
• Any other devices with small open space around solder joints

Publisher: Indium Corporation

A Novel Epoxy Flux On Solder Paste For Assembling Thermally Warped POP

Aug 17, 2017 | Ming Hu, Lee Kresge, and Ning-Cheng Lee

A novel epoxy flux EF-A was developed with good compatibility with no-clean solder pastes, and imparts high reliability for BGA assembly at a low cost. This compatibility with solder pastes is achieved by a well-engineered miscibility between epoxy and no-clean solder paste flux systems, and is further assured with the introduction of a venting channel. The compatibility enables a single bonding step for BGAs or CSPs, which exhibit high thermal warpage, to form a high-reliability assembly. Requirements in drop test, thermal cycling test (TCT), and SIR are all met by this epoxy flux, EF-A. The high viscosity stability at ambient temperature is another critical element in building a robust and userfriendly epoxy flux system. EF-A can be deposited with dipping, dispensing, and jetting. Its 75°C Tg facilitates good reworkability and minimizes the adverse impact of unfilled underfill material on TCT of BGA assemblies....

Publisher: Indium Corporation

Why is Customer Feedback So Important for PCB Assembly?

Aug 12, 2017 | Tuan Tran

PCB Assembly is Collaborative Manufacturing...

Publisher: Power Design Services

Generate Faster PCB Assembly Turnarounds

Aug 12, 2017 | Tuan Tran

The Case of Night Shifts vs. Additional Production Lines for PCB Assembly Efficiency...

Publisher: Power Design Services

High Frequency Electrical Performance and Thermo-Mechanical Reliability of Fine-Pitch, Copper - Metallized Through-Package-Vias (TPVs) in Ultra - thin Glass Interposers

Aug 10, 2017 | Sukhadha Viswanathan, Tomonori Ogawa, Kaya Demir, Timothy B. Huang, P. Markondeya Raj, Fuhan Liu, Venky Sundaram, Rao Tummala

This paper demonstrates the high frequency performance and thermo-mechanical reliability of through vias with 25 μm diameter at 50 μm pitch in 100 μm thin glass substrates. Scaling of through via interconnect diameter and pitch has several electrical performance advantages for high bandwidth 2.5D interposers as well as mm-wave components for 5G modules....

Publisher: Georgia Institute of Technology

Lean Six Sigma Approach to New Product Development

Aug 02, 2017 | Rita Mohanty

In this rapidly moving electronics market, fast to market with new products is what separates top performing companies from average companies. A survey conducted by Arthur D. Little revealed that "New-Product Development (NPD) productivity in atop performing company is five times what it is in the average company. The top performer gets five times as much new product output for the same investment." What do they know that the rest of us do not? One winning factor is the use of the Robert Cooper process. (...)

This paper will present a Lean Six Sigma approach to "right sizing" the Stage Gate process to be efficient, practical, and easy to manage. Various tools of Stage Gate, along with proven best practice, will be covered. In addition, a reduced Stage Gate model will be discussed for simple, low risk projects....

Publisher: MacDermid Inc.

Strategic Material Management Generates Value

Aug 02, 2017 | Tuan Tran

When designing innovative products, material concerns often take a backseat to user experience goals. This is natural – after all, good products that offer value to end-users are essentially guaranteed a place on the modern tech marketplace. However, material management concerns take priority when considering the cost and turnaround time of product manufacture....

Publisher: Power Design Services

Electrochemical Methods to Measure the Corrosion Potential of Flux Residues

Jul 27, 2017 | Mike Bixenman, DBA, David Lober, Anna Ailworth - Kyzen Corporation, Bruno Tolla, Ph.D., Jennifer Allen, Denis Jean, Kyle Loomis - Kester Corporation

Reliability Expectations of Highly Dense Electronic Assemblies is commonly validated using Ion Chromatography and Surface Insulation Resistance. Surface Insulation Resistance tests resistance drops on both cleaned and non-cleaned circuit assemblies. It is well documented in the literature that SIR detects ionic residue and the potential of this residue to cause leakage currents in the presence of humidity and bias. Residues under leadless components are hard to inspect for and to ensure flux residue is totally removed. The question many assemblers consider is the risk of residues that may still be present under the body of components....

Publisher: KYZEN Corporation

How to Produce the Best Circuit Boards – Fast!

Jul 24, 2017 | Tuan Tran

Professionally assembling circuit boards used to be slow. Many circuit board manufacturers still take up to two weeks or longer to produce circuit boards according to customer design specifications. ...

Publisher: Power Design Services

Strategic Material Management Generates Value

Jul 24, 2017 | Tuan Tran

When designing innovative products, material concerns often take a backseat to user experience goals. This is natural – after all, good products that offer value to end-users are essentially guaranteed a place on the modern tech marketplace. However, material management concerns take priority when considering the cost and turnaround time of product manufacture....

Publisher: Power Design Services

How to calibrate JUKI CF feeder

Jul 21, 2017 | Becky Su

1.Choose a feeder with best chip-placement ratio, install the Calibration Ruler on this feeder, then place feeder to calibration equipment’s position table....

Publisher: ZK Electronic Technology Co., Limited

Reactivity Of No-Clean Flux Residues Trapped Under Bottom Terminated Components

Jul 20, 2017 | Bruno Tolla, Ph.D., Jennifer Allen, Kyle Loomis - Kester Corporation, Mike Bixenman, DBA - KYZEN Corporation

As electronic devices increase functionality in smaller form factors, there will be limitations, obstacles and challenges to overcome. Advances in component technology can create issues that may have time delayed effects. One such effect is device failure due to soldering residues trapped under bottom terminated components. If the residues trapped under the component termination are active and can be mobilized with moisture, there is the potential for ion mobilization causing current leakage....

Publisher: Kester

Divergence in Test Results Using IPC Standard SIR and Ionic Contamination Measurements

Jul 13, 2017 | K. Tellefsen, M. Holtzer, T. Cucu, M. Liberatore, M. Schmidt - Alpha Assembly Solutions, S. Moser, L. Henneken, P. Eckold, U. Welzel, R. Fritsch, D. Schlenker - Robert Bosch GmbH

Controlled humidity and temperature controlled surface insulation resistance (SIR) measurements of flux covered test vehicles, subject to a direct current (D.C.) bias voltage are recognized by a number of global standards organizations as the preferred method to determine if no clean solder paste and wave soldering flux residues are suitable for reliable electronic assemblies. The IPC, Japanese Industry Standard (JIS), Deutsches Institut fur Normung (DIN) and International Electrical Commission (IEC) all have industry reviewed standards using similar variations of this measurement. (...)

This study will compare the results from testing two solder pastes using the IPC-J-STD-004B, IPC TM-650 2.6.3.7 surface insulation resistance test, and IPC TM-650 2.3.25 in an attempt to investigate the correlation of ROSE methods as predictors of electronic assembly electrical reliability....

Publisher: Alpha Assembly Solutions

Effects of Package Warpage on Head-in-Pillow Defect

Jul 06, 2017 | Zhenyu Zhao1, Chuan Chen, Yuming Wang, Lei Liu, Guisheng Zou, Jian Cai and Qian Wang - Tsinghua University, Chang Yong Park - Samsung Electronics

Head-in-pillow (HiP) is a BGA defect which happens when solder balls and paste can't contact well during reflow soldering. Package warpage was one of the major reasons for HiP formation. In this paper, package warpage was measured and simulated. It was found that the package warpage was sensitive to the thickness of inside chips. A FEM method considering viscoelastic property of mold compound was introduced to simulate package warpage. The CTE mismatch was found contributes to more than 90% of the package warpage value when reflowing at the peak temperature. A method was introduced to measure the warpage threshold, which is the smallest warpage value that may lead to HiP. The results in different atmospheres showed that the warpage threshold was 50μm larger in N2 than that in air, suggesting that under N2 atmosphere the process window for HiP defects was larger than that under air, which agreed with the experiments....

Publisher: Samsung Electronics

Round Robin of High Frequency Test Methods by IPC-D24C Task Group

Jun 29, 2017 | Glenn Oliver, Jonathan Weldon - DuPont, Chudy Nwachukwu - Isola, John Coonrod - Rogers Corporation, John Andresakis - Park Electrochemical, David L. Wynants, Sr. - Taconic Advanced Dielectric Division

Currently there is no industry standard test method for measuring dielectric properties of circuit board materials at frequencies greater than about 10 GHz. Various materials vendors and test labs take different approaches to determine these properties. It is common for these different approaches to yield varying values of key properties like permittivity and loss tangent. The D-24C Task Group of IPC has developed this round robin program to assess these various methods from the "bottom up" to determine if standardized methods can be agreed upon to provide the industry with more accurate and valid characteristics of dielectrics used in high-frequency and high-speed applications....

Publisher: DuPont

Testing Prototype Assembled PCBs — Who Should Do It?

Jun 29, 2017 | Tuan Tran

What's the most cost-effective method for testing prototype PCBs? Should the assembler do it, or the client's in-house engineers? This article explains all....

Publisher: Power Design Services

What Is Turnkey Electronic Manufacturing?

Jun 23, 2017 | Tuan Tran

End-to-end PCB assembly by world-class companies like Power Design Services allows you to focus on your core competencies with the added benefits of reduced cost and time to market. From material procurement to circuit board design and manufacturing, and supply chain management, we serve your needs helping you reach customers faster. Here is an overview of what our turnkey electronic manufacturing services consist of, and how you can use them to reduce your build time and cost....

Publisher: Power Design Services

Defect Features Detected by Acoustic Emission for Flip-Chip CGA/FCBGA/PBGA/FPBGA Packages and Assemblies

Jun 22, 2017 | Reza Ghaffarian, Ph.D.

C-mode scanning acoustic microscopy (C-SAM) is a non-destructive inspection technique showing the internal features of a specimen by ultrasound. The C-SAM is the preferred method for finding “air gaps” such as delamination, cracks, voids, and porosity. This paper presents evaluations performed on various advanced packages/assemblies especially flip-chip die version of ball grid array/column grid array (BGA/CGA) using C-SAM equipment. For comparison, representative x-ray images of the assemblies were also gathered to show key defect detection features of the two non-destructive techniques....

Publisher: Jet Propulsion Laboratory

Nondestructive Inspection of Underfill Layers Stacked up in Ceramics-Organics-Ceramics Packages with Scanning Acoustic Tomography (SAT)

Jun 15, 2017 | Justin Zeng, Francoise Sarrazin, Jie Lian, Ph.D., Zhen (Jane) Feng, Ph.D., Lea Su, Dennis Willie, David Geiger - Flex International Inc., Masafumi Takada, Natsuki Sugaya - Hitachi Power Solutions, George Tint, Ph.D. - HDI Solutions

Ceramics packages are being used in the electronics industry to operate the devices in harsh environments. In this paper we report a study on acoustic imaging technology for nondestructively inspecting underfill layers connecting organic interposers sandwiched between two ceramics substrates.

First, we inspected the samples with transmission mode of scanning acoustic tomography (SAT) system, an inspection routine usually employed in assembly lines because of its simpler interpretation criteria: flawed region blocks the acoustic wave and appears darker. In this multilayer sample, this approach does not offer the crucial information at which layer of underfill has flaws. To resolve this issue, we use C-Mode Scanning in reflection mode to image layer by layer utilizing ultrasound frequencies from 15MHz to 120MHz. Although the sample is thick and contains at least 5 internal material interfaces, we are able to identify defective underfill layer interfaces....

Publisher: Flex (Flextronics International)

When to Use Flex Circuit vs. Rigid Circuit Boards

Jun 14, 2017 | Tuan Tran

Flexible circuitry may be preferable to rigid circuitry in situations where space or weight is limited....

Publisher: Power Design Services

Intermetallic Growth in Tin-Rich Solders

Jun 13, 2017 | Louis Zakraysek

For tin-rich solder alloys, 200 C (392 F) is an extreme temperature. Intermetallic growth in tin-copper systems is known to occur and is believed to bear a direct relationship to failure mechanisms. This study of morphological changes with time at elevated temperatures was made to determine growth rates of tin-copper intermetallics. Preferred growth directions, rates of thickening, and notable changes in morphology were observed.

Each of four tin-base alloys was flowed on copper and exposed to temperatures between 100 C and 200 C for time periods of up to 32 days. Metallographic sections were taken and the intermetallics were examined. Intermetallic layer thickening is characterized by several distinct stages. The initial growth of side plates is extremely rapid and exaggerated. This is followed by retrogression (spheroidization) of the elongated peaks and by general thick-...

Publisher: General Electric