Electronics Manufacturing Technical Articles

3D ICs With TSVs - Design Challenges And Requirements

Dec 09, 2010 | Cadence

As demands accelerate for increasing density, higher bandwidths, and lower power, many IC design teams are looking up – to 3D ICs with through-silicon vias (TSVs). 3D ICs promise “more than Moore” integration by packing a great deal of functionality int...

Publisher: Cadence Design Systems, Inc.

Multilayer PCB Stackup Planning

Dec 02, 2010 | Barry Olney

Planning the multilayer PCB stackup configuration is one of the most important aspects in achieving the best possible performance of a product. A correctly stacked PCB substrate ca effectively reduce electromagnetic emissions, crosstalk and also make the...

Publisher: In-Circuit Design Pty Ltd

Component Shortages Causing Electronics Manufacturers to "Use All Means Necessary" to Ship Products

Nov 24, 2010 | Bob Wettermann

As the electronics manufacturing and assembly industry in the US recovers to some degree from the economic crisis which began in 2008, the challenge of component shortages has risen to the top as one of the stumbling blocks for contract assemblers and cap...

Publisher: BEST Inc.

A High Performance and Cost Effective Molded Array Package Substrate

Nov 18, 2010 | Philip Rogren, Pierangelo Magni, Maura Mazzola, Mark Shaw, Giovanni Graziosi, Claudio Maria Villa

In this article we present both a relatively new and innovative family of packages that is suitable for medium pin count needs and an innovative method for fabricating the substrates for such a package. With respect to lead count, this packaging family is...

Publisher: EoPlex Technologies, Inc.

Net Ties and How to Use Them

Nov 16, 2010 | Chris Carlson

The Net Tie is a component type which allows for shorting together various nets in a design. The graphic for the symbol can be as simple as two component pins representing a virtual component between nets or as complex as mutipul pins (as many as desired)...

Publisher: Altium

Assembling the Next Electronic Equipment Generations.

Nov 12, 2010 | Sjef v. Gastel, Manager of Advanced Development, Assembléon

Product roadmaps can look like largely theoretical constructs, but assembly requirements five or ten years down the line have very practical importance. Pick & place machines have a life of seven years or more, so they should be working up to 2017 or beyo...

Publisher: Assembléon

Optimizing BNC PCB Footprint Designs for Digital Video Equipment

Nov 06, 2010 | Tsun-kit Chin

An increasing number of video equipment is running at Gigabit rates today. They are interconnected through relatively large size coaxial BNC connectors. While these connectors are in general of good quality, their performance in the equipment depends on ...

Publisher: Samtec, Inc.

Conductive Adhesives: TheWay Forward

Nov 04, 2010 | Dr. Ken Gilleo

Conductive Adhesives represent an intrinsically clean, simple and logical solution for a myriad of electrical interconnect challenges. Adhesives not only provide a "lead-free", "no clean" alternative to solder, these highly compatible materials offer viab...

Publisher: Cookson Electronics

Organic Optical Waveguide Fabrication in a Manufacturing Environment

Oct 28, 2010 | Benson Chan, How Lin, Chase Carver, Jianzhuang Huang, Jessie Berry

Optical waveguides based on organic materials have been fabricated in a laboratory environment but the scaling and manufacturing processes needed to produce these waveguides have been scant. The volume production of low loss organic waveguides in a conven...

Publisher: i3 Electronics

High Voltage Chip Resistors

Oct 21, 2010 | F.M. Collins, W.M. Mathias

Many component engineers are faced with a circuit requirement calling for resistors having voltage ratings well above that associated with surface mount chip resistors, but below the level of conventional high voltage resistors which are generally availab...

Publisher: Ohmcraft

Assessment of Residual Damage in Leadfree Electronics Subjected to Multiple Thermal Environments of Thermal Aging and Thermal Cycling

Oct 21, 2010 | Pradeep Lall, Rahul Vaidya, Vikrant More, Kai Goebel, Jeff Suhling

Electronic systems are often stored for long periods prior to deployment in the intended environment. Aging has been previously shown to effect the reliability and constitutive behavior of second-level leadfree interconnects....

Publisher: Auburn University

Electrostatic Discharge (ESD) - Sources of Electrostatic Charges in Production Line (SMT)

Oct 13, 2010 | Dipl.-Ing. Hartmut Berndt

The number of failures caused by electrostatic discharges (ESD) has been increasing for some time now. So, it is necessary for everyone, who handles electrostatic sensitive devices (ESDS), to know the reasons of such failures. This presentation will give ...

Publisher: B.E.STAT European ESD Competence Centre

3D IC Development Needs Innovative Socket Solution

Oct 07, 2010 | Ila Pal

Evolution from cell phones with only a base-band processor and limited memory to today's high-end phones with an additional applications processor and memory has driven the industry to 3-D packaging solutions. 3-D packaging can be achieved via die stackin...

Publisher: Ironwood Electronics

Color Based Printed Circuit Board Solder Segmentation

Sep 30, 2010 | Tz-Sheng Peng, Chiou-Shann Fuh

As technology is much more advanced nowadays, electronic devices are ubiquitous in our daily life. PCB (Printed Circuit Board) plays an important role in almost every modern electronic device. However, there still is not a perfect PCB manufacturing proces...

Publisher: National Taiwan University

Mass Analysis Of The Components Separated From Printed Circuit Boards.

Sep 23, 2010 | Hana Charvátová, Dagmar Janáčová, Miloslav Fialka and Karel Kolomazník

Methods of effective and ecological recycling of printed circuit boards (PCBs) are searched all over the world at this time. The material composition and temperature properties of PCB are necessary to be known for an optimal recycling technology. For thi...

Publisher: Acta Montanistica Slovaca

Next Best Thing to a Close Shave: Mitigating the Risks of Tin Whiskers

Sep 23, 2010 | Brian Toleno, Ph.D., Henkel Corporation

If you've been in electronics for any length of time, the phenomenon of tin whiskers is something you've likely heard discussed (maybe in scared whispered tones). Tin whiskers certainly aren't a new problem. In fact, some of the first published reports of the occurrence date back to the 1940’s and 1950's. But, over half a century later, we're still talking about it....

Publisher: Henkel Electronic Materials

Modern 2D / 3D X-Ray Inspection - Emphasis on BGA, QFN, 3D Packages, and Counterfeit Components

Sep 16, 2010 | Evstatin Krastev, David Bernard

With PCB complexity and density increasing and also wider use of 3D devices, tougher requirements are now imposed on device inspection both during original manufacture and at their subsequent processing onto printed circuit boards. More complicated and de...

Publisher: Nordson DAGE

How to Profile a PCB.

Sep 10, 2010 | M. N. Srinivasa Prasad.

An optimal reflow profile is one of the most critical factors in achieving quality solder joints on a printed circuit board (PCB) assembly with surface mount components. A profile is a function of temperatures applied to the assembly over time. When graphed on a Cartesian plane, a curve is formed that represents the temperature at a specific point on the PCB, at any given time, throughout the reflow process....

Publisher: Robert Bosch LLC Automotive Electronics Division

Cleanliness of Stencils and Cleaned Misprinted Circuit Boards

Sep 09, 2010 | Bev Christian

The effectiveness of cleaning stencils and misprinted/dirty printed circuit boards can be effectively monitored. This can be done by washing known clean circuit boards and then checking to see if they have stayed clean as a result of the washing process. ...

Publisher: Research In Motion

Using JTAG Emulation for Board-Level Functional Test Demanding Test

Sep 02, 2010 | ScanExpress JET™ White Paper

As chip packaging and interconnectivity have become more dense and operate at higher clock frequencies, physical access for traditional bed-of-nails testing becomes limited. This results in loss of ICT (in-circuit test) fault coverage and higher test fi...

Publisher: Corelis Inc

Digital manufacturing for traceability: The way to higher product quality and better warranty management

Aug 26, 2010 | Siemens PLM Software

Driven by high-profile regulations compliance like the TREAD Act, warranty management has become a hot topic across industries worldwide. Recalls are costly and time-consuming events that should be avoided entirely. But without adequate process traceability and product genealogy, too many customers will get defective products and too many products will be recalled for repair or replacement even though they are not defective. Both scenarios have enormous implications for the quality-conscious manufacturer that gets rated on the number of recalls it performs - not to mention the enormous direct costs. The core issue is visibility into product quality....

Publisher: ASM Assembly Systems GmbH & Co. KG

Implementation challenges for PCB tracking using RFID

Aug 26, 2010 | Murata

Radio frequency identification (RFID) ICs are a popular alternative to barcodes for PCB tracking applications. This article outlines some of the challenges that may be encountered when implementing an RFID system...

Publisher: Murata Manufacturing Co., Ltd.

AdvancedCMT vs. Pressfit. The advantages of the Compression Mount Technology (CMT) when using AdvancedTCA and MicroTCA connectors.

Aug 26, 2010 | CODICO GmbH, Yamaichi Electronics

The advantages of the Compression Mount Technology (CMT) when using AdvancedTCA and MicroTCA connectors....

Publisher: Yamaichi Electronics

Challenges of Lead-Free Low Silver Content End Termination Pastes for Inductor Applications

Aug 19, 2010 | Dong Zhang, Meg Tredinnick, Mark Challingsworth

The silver end termination plays an important role for multilayer chip inductors. A basic requirement is to achieve excellent electrical properties with superior adhesion to the chip. Driven by the increasing price of silver, interest has been shown to ...

Publisher: Heraeus

Realistic Implementation of Signal Integrity Screening – Guidelines for PCB Designers

Aug 19, 2010 | Griff Derryberry

This article looks at each of the roles of the engineer and PCB designer, considers the traditional design process, and makes suggestions on how the designer can contribute significantly to improving a design’s overall signal integrity while simultaneousl...

Publisher: Zuken

PWB Manufacturing Variability Effects on High Speed SerDes Links: Statistical Insights from Thousands of 4-Port SParameter Measurements

Aug 05, 2010 | Bart O. McCoy, Robert Techentin, Benjamin Buhrow, Kevin Buchs, Dr. Barry K. Gilbert, Dr. Erik S. Daniel, How Lin

Variability analysis is important in successfully deploying multi-gigabit backplane printed wiring boards (PWBs) with growing numbers of high-speed SerDes links. We discuss the need for large sample sizes to obtain accurate variability estimates of SI me...

Publisher: i3 Electronics

01005 Production Goes Industry Wide

Jul 29, 2010 | Satoshi Kataoka, Eric Klaver

The introduction of the 01005 chip components in 2004 was a challenge to the whole electronics equipment assembly industry. The components’ miniature size made them difficult to see, let alone place reliably with high accuracy. Designers were reluctant to...

Publisher: Assembléon

THT in-line Inspection: Contradiction or greater Efficiency?

Jul 22, 2010 | Jens Kokott

The utilisation of Automated Optical Inspection systems has become an integral part in quality assurance of electronic assemblies. Depending on batch size and product mixture, AOI systems as Inline integration or as a stand-alone solution benefit efficien...

Publisher: GOEPEL Electronic

A New Stenciling Method for Reworking SMT Components

Jul 15, 2010 | Bob Wettermann

When reworking more complex SMT components such as finer pitch SMT components, SMTconnectors and even area array devices, the most common method of printing on the printing selectively on the PCB has some serious shortcomings. The most significant problem...

Publisher: BEST Inc.

Effect of Soldering Parameters on Reaction Kinetics and Phase Transformations of SAC 305 Solder

Jul 08, 2010 | T. Ryno, A. Kelley, J. Metzger, and D. Medlin; Department of Materials and Metallurgical Engineering, South Dakota School of Mines and Technology | C. Voyles, S. Richards; Radiance Technologies

As technology becomes increasingly reliant on electronics, understanding the reliability of lead-free solder also becomes increasingly important. This research project focused on phase transformation kinetics with the lead-free solder SAC 305. Today in the electronics industry, SAC 305 is the most widely used solder, making it a high priority to understand its long-term stability and performance in a variety of service conditions. Recent evidence has shifted the focus from thermal aging to reflow temperature and time above liquidus values during initial solder melting....

Publisher: Radiance Technologies

Effects of Thermal Aging on Copper Dissolution For SAC 405 Alloy

Jul 08, 2010 | Dr. Dana Medlin, Clay Voyles, Teneil Ryno, Casey Bergstrom, John Metzger, and Spencer Richards

Aging characteristics of new lead free solder alloys are in question by many experts because of higher amount of tin’s effect on the diffusion of other metals, primarily copper, to create undesirable boundary intermetallics over long periods of time and even moderately elevated temperatures. A primary layer of intermetallics, Cu6Sn5 forms as the liquid solder makes contact with the solid copper substrate. This reaction however ceases as the solder temperature falls below that of liquidus. A secondary intermetallic Cu3Sn1, an undesirable weak and brittle layer, is thought to form over time and may be accelerated by even mildly elevated temperatures in electronic modules such as laptops under power.

This project was designed to quantify the growth rate of Cu3Sn1 over an extended period of time in a thermal environment similar to a laptop in the power on mode....

Publisher: Radiance Technologies

Power Supply Control from PCB to Chip Core

Jun 30, 2010 | Nur Devnani, Eileen Murray

As silicon technology advances to enable higher density ASICs, the core logic voltage decreases. The lower voltage, in combination with higher current requirements, requires tighter tolerances on the power supplies. The control of the power supplies from the PCB to the die is the subject of this study. A frequency sweep simulation using typical bypass values shows that a discrete package capacitor is not a significant factor in reducing the chip core power supply fluctuation. A small voltage boost at the PCB supply can provide a more economical solution to managing the device supplies....

Publisher: Avago Technologies

Conductive Adhesives Increase Microchip Packaging Density

Jun 24, 2010 | Jakob Gakkestad, Per Dalsjo, Helge Kristiansen, Rolf Johannessen, and Maaike M.V. Taklo

Cost-effective assembly of custom-designed microelectromechanical systems (MEMS) for medium-caliber fuzes is challenging. In particular, the environment must have a setback acceleration exceeding 60,000g and centripetal acceleration of 9000g/mm out of center in a 30mm173 projectile. In addition, the space available is very limited. The traditional approach is to mount the MEMS chip in a package that is then soldered to the printed circuit board (PCB). However, by mounting the MEMS chip directly to the PCB using conductive adhesive, we can increase the packaging density while reducing manufacturing cost....

Publisher: SPIE - International Society for Optical Engineering

Next-Generation Test Equipment For High-Volume Wafer Production

Jun 23, 2010 | Kay Gastinger, Odd Løvhaugen

Quality control is one of the main bottlenecks in the production of micro-opto-electromechanical systems/microelectromechanical systems (MOEMS/MEMS) because each structure on a wafer is serially inspected and scanned stepwise over the entire wafer area. ...

Publisher: SPIE - International Society for Optical Engineering

Effect Of Squeegee Blade On Solder Paste Print Quality

Jun 17, 2010 | Rita Mohanty, Bill Claiborne; Speedline Technologies | Frank Andres; Cookson Electronics

The solder paste deposition process is viewed by many in the industry as the leading contributor of defects in the Surface Mount Technology (SMT) assembly process. As with all manufacturing processes, solder paste printing is subject to both special and common cause variation. Just like using graduated cylinders from distinctly different manufacturing processes to measure a volume of liquid, using different blades types can contribute significant special cause variation to a process. Understanding the significant differences in print performance between blade types is an important first step to establishing a standard blade for an SMT process....

Publisher: Speedline Technologies, Inc.

Validity of the IPC R.O.S.E. Method 2.3.25 Researched

Jun 10, 2010 | Mike Bixenman, Steve Stach

This paper researches the effectiveness of the R.O.S.E. cleanliness testing process for dissolving and measuring ionic contaminants from boards soldered with no-clean and lead-free flux technologies....

Publisher: KYZEN Corporation

Strategies for Designing Microwave Multilayer Printed Circuit Boards Using Stripline Structures

Jun 03, 2010 | Thomas McCarthy, Sean Reynolds, Jon Skelly

Strategies for successful design and manufacture of microwave multilayer printed circuit boards. All aspects from pad registration, dimensional stability, impedance fluctuation, fusion bonding, thermal ageing, z-axis expansion, reliability, to Young's mod...

Publisher: Taconic

The Reliability Challenges of QFN Packaging

May 27, 2010 | Randy Kong, Cheryl Tulkoff, Craig Hillman (presented at: SMTA China East Conference 2010)

The quad flat pack no lead or quad flat non-leaded (QFN) is one of the fastest growing package types in the electronics industry today. While the advantages of QFNs are well documented, concerns arise with its reliability and manufacturability. Acceptance of this package, especially in long-life, severe-environment, high-reliability applications, is currently limited. One of the most common drivers for reliability failures is inappropriate adoption of new technologies, such as the case with QFN. In this presentation, we will review and discuss QFN related reliability concerns and challenges, and propose Physics-of-Failure (PoF) based approaches to allow the confident introduction of QFN components into electronics products....

Publisher: DfR Solutions

FlyScan: Wenn eins plus eins mehr als zwei ist

May 24, 2010 | Bernd Hauptmann – Sales Manager Seica Deutschland GmbH

Die echte Integration zwischen ATE Flying Prober und Boundary Scan Tester, vorgestellt von Seica, kombiniert das Beste von beiden Testtechniken und multipliziert die Vorteile für den Anwender....

Publisher: SEICA SpA

Testing Digital Designs – The Boundary-scan Balance

May 20, 2010 | James Stanbridge, Steve Lees

As several industry pundits have expressed in recent years: "the era of 'one test method fits all' seems well behind us." For most test managers with even a modest mix of products, trying to formulate a test policy/philosophy has become a tricky balancing act at the best of times. James Stanbridge, Sales Manager UK for JTAG Technologies, and Steve Lees Managing Director of ATE Solutions look at the options....

Publisher: JTAG Technologies B. V.

Leaded and Lead-Free Solder Paste Evaluation Screening Procedure

May 12, 2010 | Ronald C. Lasky, Ph.D., PE; Indium Corporation of America Daryl Santos, Ph.D., Aniket A. Bhave; Binghamton University

Numerous studies have shown that greater than 60% of end of line defects in SMT assembly can be traced to solder paste and the printing process. Reflowing adds another 15% or so. In light of this fact, it is surprising that no simplified procedure for solder paste evaluation has been documented. This paper is about such a procedure....

Publisher: Indium Corporation

Effect Of Board Clamping System On Solder Paste Print Quality

May 06, 2010 | Dr. Rita Mohanty; Speedline Technologies, Rajiv L. Iyer, Daryl Santos; Binghamton University

Stencil printing technology has come a long way since the early 80’s when SMT process gained importance in the electronics packaging industry. In those early days, components were fairly large, making the board design and printing process relatively simple. The current trend in product miniaturization has led to smaller and more complex board designs. This has resulted into designs with maximum area utilization of the board space. It is not uncommon, especially for hand held devices, to find components only a few millimeters from the edge of the board. The board clamping systems used in the printing process have become a significant area of concern based on the current board design trend....

Publisher: Speedline Technologies, Inc.

Effects of Reflow Profile and Thermal Conditioning on Intermetallic Compound Thickness for SnAgCu Soldered Joints

Apr 29, 2010 | Jianbiao Pan, Tzu-Chien Chou, Jasbir Bath, Dennis Willie, Brian J. Toleno

The purpose of this paper is to investigate the effects of reflow time, reflow peak temperature, thermal shock and thermal aging on the intermetallic compound (IMC) thickness for Sn3.0Ag0.5Cu (SAC305) soldered joints....

Publisher: Flex (Flextronics International)

An Effective Design of Experiment Strategy to Optimize SMT Processes

Apr 22, 2010 | Ronald C. Lasky, Ph.D., PE, Professor Daryl Santos, Ph.D., Joseph R. Cloyd

It is now widely accepted that using designed experiments is the most effective way to optimize surface mount technology (SMT) processes. This situation begs the question "what is an effective strategy in implementing this powerful tool?" This paper will present such a strategy that incorporates Taguchi's approach for screening, full factorial analysis for optimization and central composite design for precise modeling. We will present these techniques using MINITABTM Release 13 statistical software and printed circuit board industry applications....

Publisher: Indium Corporation

Case study: Improving PCBA Yield

Apr 22, 2010 | Subrat Prajapati

Current situation: Present Rejection = 18%.

Sigma Level = 2.42

Scope of Project: Vendor PCB Assembly to Functional Testing of PCBA...

Publisher: Larsen Toubro Medical Equipment & Systems Ltd

Ceramic to Plastic Packaging

Apr 15, 2010 | Michael D. Frederickson, EMPF Director; Barry Thaler, Ph.D. EMPF Technical Director Empfasis Technical Editor; Paul Bratt, Empfasis Editor.

As electronic products increase in functionality and complexity, there is an emphasis on affordability, miniaturization, and energy efficiency. The telecommunications, automotive, and commercial electronic markets are the leading drivers for these trends. These markets see high volume manufacturing with millions of units priced to the fraction of the cent. The choice of the packaging material for the electrical components for these markets can have a substantial effect on the cost of the final product. Therefore plastic encapsulated components are almost universally used in non-military applications over the conventional ceramic or metal electronic packages....

Publisher: Electronics Manufacturing Productivity Facility (EMPF)

Thick Film Polymer Resistors Embedded in Printed Circuit Boards

Apr 15, 2010 | Lynne Dellis, M S Chan, Tom Dueber, Shane Fang, John Summers; DuPont Electronic Technologies

The high level of current interest in embedded passives in printed circuit boards is driven by the tremendous pressure to pack more circuitry into smaller spaces. However, adoption has been limited due to design, prototyping and infrastructure issues, as well as the stability and tolerances necessary for widespread replacement of discretes. The focus of this work has been to develop a polymer thick film resistor technology to incorporate reliable organic resistors inside printed wiring boards using standard PWB processing....

Publisher: DuPont

Shedding Light on Machine Vision

Apr 07, 2010 | Microscan

For effective machine vision, the first step in devising a vision system should be the lighting. This paper reviews important criteria for setting up an effective lighting system....

Publisher: Microscan

Drop Impact Reliability of Edge-bonded Lead-free Chipscale Packages

Mar 30, 2010 | Andrew Farris, Jianbiao Pan, Albert Liddicoat, Michael Krist, Nicholas Vickers, Brian J.Toleno, Dan Maslyk, Dongkai Shangguan, Jasbir Bath, Dennis Willie, David A. Geiger.

This paper presents the drop test reliability results for edge-bonded 0.5mm pitch lead-free chip scale packages (CSPs) on a standard JEDEC drop reliability test board....

Publisher: Flex (Flextronics International)

Stencil Design Using Regression:Following IPC 7525 a Way Better

Mar 25, 2010 | Subrat Prajapati; Process Engineering Larsen & Toubro Limited, Medical Equipment and Systems (EBG)

The complexity of Printed Circuit Assembly process is increasing day by day and causing productivity issues in the industry, introducing ultra fine pitch components (pitch less than 15mil) in PCA is a challenge to minimize risk of defects as solder short, dry solder. This paper is focusing on minimizing these defects....

Publisher: Larsen Toubro Medical Equipment & Systems Ltd