How to Solve Impedance Matching Problems in PCB Designs

In order to prevent reflection in the high-speed PCB design should be considered impedance matching, but due to the PCB processing process limits the impedance continuity and simulation can not be simulated, in the schematic design of how to consider this issue? In addition, regarding the IBIS model, I don't know where I can provide a more accurate IBIS model library. Most of the libraries we downloaded from the Internet are not very accurate, which affects the reference of simulation. 　　When designing a high speed PCB circuit, impedance matching is one of the design elements. The impedance value has absolute relationship with the way of routing, for example, whether it is in the surface layer (microstrip) or inner layer (stripline/double stripline), and the distance from the reference layer (power layer or ground layer), the width of the route, the PCB material, etc. will affect the characteristic impedance value of the route. In other words, the impedance value can only be determined after the wiring is done. General simulation software will be due to the line model or the use of mathematical algorithms can not take into account the limitations of some of the impedance discontinuity of the wiring, which can only be reserved on the schematic diagram of the terminators (termination), such as series resistance to ease the effect of discontinuity of the impedance of the alignment. The real fundamental solution to the problem is to try to avoid the occurrence of impedance discontinuity when wiring. The accuracy of the IBIS model directly affects the simulation results. Basically, IBIS can be regarded as the electrical characteristics of the equivalent circuit of the actual chip I/O buffer, which can be converted from the SPICE model (measurement can also be used, but with more limitations), and the SPICE information has an absolute relationship with the chip manufacturing, so the same device is supplied by different chip makers, and the SPICE information is different, which will lead to a different information in the converted IBIS model. Therefore, the SPICE data of the same device provided by different chip manufacturers is different, and the data in the converted IBIS model will also be different. That is to say, if you use the device of vendor A, only they have the ability to provide accurate modeling information of their devices, because no one else will know better than them what kind of process their devices are made of. If the IBIS provided by the vendor is inaccurate, the only way to solve the problem is to keep asking the vendor to improve it. 　　In high-speed PCB design, we use the software is only to set up a good EMC, EMI rules for checking, and the designer should be from those aspects to consider EMC, EMI rules? How to set the rules? 　　General EMI/EMC design need to consider both radiation (radiated) and conduction (conducted) two aspects. The former belongs to the higher frequency part (>30MHz) and the latter is the lower frequency part (<30MHz). So you can't just focus on the high frequencies and ignore the low frequencies. A good EMI/EMC design must start with a layout that takes into account the location of devices, PCB iterations, important connections, device selection, etc. If this is not done properly beforehand, it will be twice as expensive to fix it later. For example, the clock generator should be located as close as possible to the external connectors. High-speed signals should be routed in the inner layer as much as possible, and attention should be paid to the characteristic impedance matching and the continuity of the reference layer in order to minimize reflections. The slope of the signals pushed by the device should be as small as possible in order to minimize the high-frequency components. When choosing decoupling/bypass capacitors, attention should be paid to whether the frequency response is up to the requirement in order to reduce the noise of the power supply layer. . In addition, pay attention to the return path of the high-frequency signal current so that the loop area is as small as possible (that is, the loop impedance loop impedance is as small as possible) to reduce the radiation. Can also be used to divide the ground layer in order to control the scope of high-frequency noise. Finally, the appropriate choice of PCB and shell grounding....