Jul 08, 2003
One full- and seven half-day courses will be held Monday, September 29 and Thursday, October 2. In this year�s expansive schedule, participants will be able to remain in the forefront of electronics interconnection advances by discovering the latest data on lead free solder surface finishes, embedded resistors and laser trim. Attendees will also gain a better understanding of how to better manufacturing processes and increase their company�s return on investment.
The full-day course offered on October 2 is:
Lead Free Soldering: Metallurgical Fundamentals Reflow Application and Challenges�This course is designed to provide a thorough understanding of the fundamental design considerations of lead free alloys, with emphasis on metallurgical properties analysis. The performance of representative alloys on reflow soldering will be presented and compared, in order to illustrate the processing potentials of those alternatives. Major challenges encountered will also be discussed, with a focus on metallurgical causes.
Among the half-day courses being offered on both dates are:
Reliability Issues for Lead Free Solders�In this course, the reliability threats to the solder attachments and the printed circuit board (PCB) substrates and components will be discussed. Solder creep-fatigue behavior and different load drivers, such as thermal cycling, vibration, and mechanical shock will be explained. Additionally, physics-of-failure and failure statistics from 30 years of research and documentation will be covered in this session.
Lead Free Surface Finishes and Compatibility with Lead Free Soldering�The electronics industry is moving rapidly to lead free soldering that protects the bare copper prior to assembly. In addition to coplanarity and lead free, these surface finishes provide the optimum lead free solder paste spreadability and lead free solder through hole fill for optimum joint strength. This workshop will examine how higher temperature melting points for lead free solders will impact solderability and long term reliability. Attendees will also learn what fabricators must do to be successful with lead free finishes.
Embedded Resistors and Capacitors: Materials, Processes and Applications�This course will review the current resistor and capacitor materials, new materials and the processes required to embed them into the PCB. In addition, design considerations, performance and reliability, applications, test considerations and economics will be covered.
Embedded Passives Laser Trim�In order to fit more ICs and passive components in a design without increasing size, many manufacturers are currently exploring methods to bury the passives within the inner layers of the PCB. This course will discuss an enabling technology that has been developed and tested to trim embedded resistors to meet 1% tolerance levels for a variety of materials. The discussion will include a description of the challenges specific to trimming embedded resistors, as well as the specific processes and cost effective tools developed to overcome these challenges.
Understanding National Technology Roadmaps�In an era of global competitiveness, companies are facing increased pressure to cut costs and yet still produce innovative products. While a myriad of strategies are being employed to help companies succeed, one popular strategy is roadmapping. This course will explore many of the industry roadmaps that have been published and present the key components of roadmapping, as well as the mechanisms for translating industry roadmaps into practical solutions that work.
Understanding the Board Purchasing Process�Dealing with a variety of board manufacturers can be an exciting challenge for every purchasing department. The issue, however, is not just getting the product at the most reasonable price; it�s also whether the manufacturer understands the documentation requirements, construction differences and circuit performance requirements. This course will present an overview of PCB manufacturing, discuss cost drivers and relative PCB costs and examine customer supplier relationships. Attendees will also learn how to conduct a vendor survey.
Bare Die Integration�As the product form factor for wireless communication and customer demands for miniaturization increase, the need to mount the die without a package (in its smallest form factor) has become exceedingly important. Improvements in Known Good Die (KGD) concepts will be explored, as well as the manner in which chip-on-board, chip-in-board and bare die integration into a miniature electronic assembly can be accomplished.
For more information, visit http://www.ipc.org/annual or contact Joe Dudeck, IPC�s communications manager, at JoeDudeck@ipc.org or 847-790-5371.
About IPC
IPC is a Northbrook, Ill.-based trade association dedicated to the competitive excellence and financial success of its more than 2,300 member companies, which represent all facets of the electronic interconnection industry, including design, printed circuit board manufacturing and electronics assembly. As a member-driven organization and leading source for industry standards, training, market research and public policy advocacy, IPC supports programs to meet the needs of a $40 billion U.S. industry employing more than 350,000 people. IPC maintains offices in Taos, N.M.; Washington, D.C.; Garden Grove, Calif.; and Shanghai, China. For more information, visit http://www.ipc.org.
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