Electronics Forum | Wed Oct 12 11:19:46 EDT 2005 | patrickbruneel
Yeah, adopting is the right word. In this new lead-free era spec.'s are made to stay within the scoop of the RoHS directive. The driving force for spec.'s should be reliability. Did you see any impurity level spec.'s yet in wave soldering for Cu, Au,
Electronics Forum | Wed Dec 09 10:02:10 EST 1998 | Earl Moon
| Does anybody out there have any special insights into utilizing no clean paste in high frequency RF applications? I would imagine there may be some issues with solder balls that would affect functional test (Earl, do you have something for me here?
Electronics Forum | Tue Jun 15 12:03:27 EDT 1999 | Dave F
| Has anyone had issues where bottomside double reflowed smt has fallen off in the wave when using voc-free flux? I have verified the hotter profile was not the issue by using an alcohol based flux with no problems.This voc-free flux is also not caus
Electronics Forum | Mon Dec 11 20:44:37 EST 2006 | davef
Title : LEAD-FREE WAVE SOLDER FLUX EVALUATION Author : Michael Havener Author Company : Benchmark Electronics, Inc Date : 09/25/2005 Conference : SMTA International Abstract : The European Union�s deadline to ban lead in electronic pr
Electronics Forum | Sun Apr 15 23:35:14 EDT 2007 | Sam
few more questions: Is there any standard saying that the dull surface is accepted if solder Au plated leads? Understand that more than 3% Au in the solder connection leads to unacceptable embrittlement of the connection. How about any standard relat
Electronics Forum | Fri Dec 26 00:30:36 EST 2003 | Indy
hi, I wondering if anyone have any information on intermetallic growth in 80Au20Sn solder alloy. I have read that it has high reliability. Which bring an important question to my mind. What about Gold embrittlement ? Bye Indy
Electronics Forum | Tue Oct 07 08:38:05 EDT 2003 | davef
J-STD-001C requires removal of gold from (through-hole) component leads when the thickness of the gold layer is above 2.5 microns to prevent problems with embrittlement. The thickness of gold on an ENIG board typically is around 0.05 micron, resultin
Electronics Forum | Tue May 21 16:18:57 EDT 2019 | edhare
Interesting problem. I've seen this before on SMT device leads (see Gold Embrittlement paper at http://www.semlab.com). The AuSn4 IMC is solid at typical reflow temperatures and traps volatiles in the solder joint. One usually cannot crank the ref
