Electronics Forum | Fri Oct 24 13:51:27 EDT 2003 | stefwitt
We usually matched the value with the thickness of the paste or stencil. If the lead doesn�t dip into the paste it will not be soldered.
Electronics Forum | Fri Oct 24 16:59:13 EDT 2003 | arturoflores
Refer to your components' drawings to check for this data.
Electronics Forum | Sat Oct 25 18:46:39 EDT 2003 | Gabriele
JEDEC Standards allows max 4 mils lead coplanarity Gabe
Electronics Forum | Sat Nov 22 08:07:57 EST 2003 | davef
Search the fine SMTnet Archives for discussion on: * Machine capability * Process capability * Capability index * Cp * Cpk
Electronics Forum | Thu Apr 15 15:32:27 EDT 2004 | russ
Where does the 260 Deg. C spec. come from that you mention?
Electronics Forum | Mon May 24 08:49:29 EDT 2004 | davef
ANSI/J-STD-002, Solderability Tests for Component Leads, Terminations, Lugs, Terminals, and Wires
Electronics Forum | Tue Nov 09 22:43:39 EST 2004 | Fengang
Hi all, Yesterday I met a VCO(Vector-Controlled Oscillator) supplier, who provided the component spec -- peak temperature over 240 centigrade stands 7secs. But this spec is obviously different from our spec -- 260 centigrade 10secs. They told me th
Electronics Forum | Wed Jun 08 20:18:19 EDT 2005 | Grant
Hi, We use as close as possible, but well within the placement machine spec. Is that normal? Grant
Electronics Forum | Tue Aug 23 15:37:20 EDT 2005 | russ
Thought I was the only one who used this calculation for spec'ing equip.
Electronics Forum | Thu Aug 11 21:30:03 EDT 2005 | Ken
The fastest way to kill your career is to spec a TD for your factory.
