Technical Library | 2019-05-23 10:42:00.0
Why identify flux residues? The primary purpose of flux is to reduce species of metal oxides from solderable surfaces, and to act as a mechanism for lifting and removing debris. If the assembly is not properly cleaned after manufacturing, flux may continue to reduce metals and may eventually corrode the assembly. When the assembly is powered, the metal ions may precipitate along electromagnetic field lines and form dendritic shorts. In addition, the presence of residue can alter the insulation properties of a board, affect the adhesion of the conformal coating, or interfere with the moving parts of the assembly. In radio frequency (RF) applications, flux may change the RF properties on the surface of the printed circuit board (PCB) such as the dielectric strength, surface resistance, and Q-resonance.
Technical Library | 2018-11-07 20:48:01.0
Glass offers a number of advantages as a dielectric material, such as a low coefficient of thermal expansion (CTE), high dimensional stability, high thermal conductivity and suitable dielectric constant. These properties make glass an ideal candidate for, among other things, package substrate and high-frequency PCB applications. We report here a novel process for the production of printed circuit boards and integrated circuit packaging using glass as both a dielectric medium and a platform for wiring simultaneously.
Technical Library | 2019-12-30 02:09:39.0
How to choose the material of PCB ? The choice of PCB material must meet the design requirements, the quality of production and cost need to achieve a balance. The design requirements include electrical and institutional parts. This material problem is usually important when designing very high speed PCB boards (frequencies greater than GHz). For example, the commonly used FR-4 material may not be used when dielectric loss at several GHz frequencies, which can have a significant effect on signal attenuation . In the case of electrical, it is important to note whether the dielectric constant and the dielectric loss are combined at the designed frequency
Technical Library | 2019-05-08 21:52:28.0
Cold ball pull testing is used to validate the resistance of PCB pad cratering for the different ultra-low loss dielectrics materials (Dk=3~4.2 and Df
Technical Library | 2012-01-05 18:40:07.0
Conformal coating is applied to circuit cards to provide a dielectric layer on an electronic board. This layer functions as a membrane between the board and the environment. With this coating in place, the circuit card can withstand more moisture by incre
Technical Library | 2018-08-08 21:55:00.0
180 °C and Td >400 °C. In addition to a high thermal stability, Material A also shows a dielectric loss factor lower than commercial phosphorus-based flame retardants.
Technical Library | 2019-02-13 13:45:11.0
Development of information and telecommunications network is outstanding in recent years, and it is required for the related equipment such as communication base stations, servers and routers, to process huge amount of data in no time. As an electrical signal becomes faster and faster, how to prevent signal delay by transmission loss is a big issue for Printed Circuit Boards (PCB) loaded on such equipments. There are two main factors as the cause of transmission loss; dielectric loss and conductor loss. To decrease the dielectric loss, materials having low dielectric constant and low loss tangent have been developed. On the other hand, reducing the surface roughness of the copper foil itself to be used or minimizing the surface roughness by modifying surface treatment process of the conductor patterns before lamination is considered to be effective in order to decrease the conductor loss. However, there is a possibility that reduction in the surface roughness of the conductor patterns will lead to the decrease in adhesion of conductor patterns to dielectric resin and result in the deterioration of reliability of PCB itself. In this paper, we will show the evaluation results of adhesion performance and electrical properties using certain type of dielectric material for high frequency PCB, several types of copper foil and several surface treatment processes of the conductor patterns. Moreover, we will indicate a technique from the aspect of surface treatment process in order to ensure reliability and, at the same time, to prevent signal delay at the signal frequency over 20 GHz.
Technical Library | 2012-02-16 16:53:16.0
Channel simulations are only as accurate as the models used to develop them. While we have seen much effort placed on printed circuit board (PCB) materials (copper finish, dielectric moisture absorption), other elements within the channel have been largel
Technical Library | 2017-06-29 16:39:30.0
Currently there is no industry standard test method for measuring dielectric properties of circuit board materials at frequencies greater than about 10 GHz. Various materials vendors and test labs take different approaches to determine these properties. It is common for these different approaches to yield varying values of key properties like permittivity and loss tangent. The D-24C Task Group of IPC has developed this round robin program to assess these various methods from the "bottom up" to determine if standardized methods can be agreed upon to provide the industry with more accurate and valid characteristics of dielectrics used in high-frequency and high-speed applications.
Technical Library | 1999-05-07 08:50:40.0
To enable transistor scaling into the 21st century, new solutions such as high dielectric constaConventional scaling of gate oxide thickness, source/drain extension (SDE), junction depths, and gate lengths have enabled MOS gate dimensions to be reduced from 10mm in the 1970’s to a present day size of 0.1mm. To enable transistor scaling into the 21st century, new solutions such as high dielectric constant materials for gate insulation and shallow, ultra low resistivity junctions need to be developed. In this paper, for the first time, key scaling limits are quantified for MOS transistorsnt materials for gate insulation and shallow, ultra low resistivity junctions need to be developed.
