Technical Library | 2023-01-10 20:08:36.0
Nickel corrosion in ENIG and ENEPIG is occasionally reported; when encountered at assembly it manifests as soldering failures in ENIG and wire bond lifts in ENEPIG. Although not common, it can be highly disruptive, resulting in missed deliver schedules, supply chain disruption, failure analysis investigations, and liability - all very costly.
Technical Library | 2023-01-06 16:18:23.0
PCB/Substrate Finishing Overview - iNEMI - PCB Surface Finish Overview. Surface Finish deployment ranked by surface area. OSP greatest. Imm Tin. ENIG. Silver. ENEPIG.
Technical Library | 2017-09-07 13:56:11.0
As a surface finish for PCBs, Electroless Nickel/Electroless Palladium/Immersion Gold (ENEPIG) was selected over Electroless Nickel/Immersion Gold (ENIG) for CMOS image sensor applications with both surface mount technology (SMT) and gold ball bonding processes in mind based on the research available on-line. Challenges in the wire bonding process on ENEPIG with regards to bondability and other plating related issues are summarized.
Technical Library | 2019-04-17 21:29:14.0
Electroless nickel electroless palladium immersion gold (ENEPIG) surface finish for printed circuit board (PCB) has now become a key surface finish that is used for both tin-lead and lead-free solder assemblies. This paper presents the reliability of land grid array (LGA) component packages with 1156 pads assembled with tin-lead solder onto PCBs with an ENEPIG finish and then subjected to thermal cycling and then isothermal aging.
Technical Library | 2012-10-11 19:50:09.0
First published in the 2012 IPC APEX EXPO technical conference proceedings. This paper shows the benefits by using a pure palladium Layer in the ENEPIG (Electroless Nickel, Electroless Palladium, Immersion Gold) and ENEP (Electroless Nickel, Electroless P
Technical Library | 2015-11-25 14:15:12.0
In this study various printed circuit board surface finishes were evaluated, including: organic solderability preservative (OSP), plasma finish (PF), immersion silver (IAg), electroless nickel / immersion silver (ENIS), electroless nickel / immersion gold hi-phosphorus (ENIG Hi-P), and electroless nickel / electroless palladium / immersion gold (ENEPIG). To verify the performance of PF as a post-treatment option, it was added to IAg, ENIG Hi-P, and ENEPIG to compare with non-treated. A total of nine groups of PCB were evaluated. Each group contains 30 boards, with the exception on ENIS where only 8 boards were available.
Technical Library | 2021-12-29 19:52:50.0
Medtronic seeks to quantify the thermal aging limits of electroless Ni-electroless Pd-immersion Au (ENEPIG) surface finishes to determine how aggressive the silicon burn-in process can be without loss of solderability. Silicon burn-in (power testing at elevated temperature) is used to eliminate early field failures, critical for device reliability. Thermal aging due to burn-in or annealing causes Ni and Pd diffusion to and oxidation on the surface. Surface oxides limit wetting of the PbSn solder, affecting electrical connectivity of components soldered afterburn-in. Isothermal aging of two ENEPIG surface finishes was performed at 75°C-150°C for 100 hrs-1500hrs to test the thermal aging limits and identify how loss of solderability occurs.
Technical Library | 2011-03-30 21:14:33.0
The expression "multifunctional PCB", as a synonym for a PCB which is applicable with a variety of assembly techniques, is already established on the market. That means the PCB can be used for multiple reflow soldering and multiple assembly techniques lik
Technical Library | 2021-07-06 21:18:02.0
A new PCB surface finish has been developed that offers outstanding performance and excellent environmental protection. This finish has the potential to replace more common finishes such as ENIG, ImAg, ImSn, ENEPIG, or OSP with a chemically resistant plasma deposited coating. The substitution of the wet processes with this dry plasma process offers significant advantages e.g. lower quantities of chemicals used, environmental benefits and improved operator safety.
Technical Library | 2012-12-13 21:20:05.0
First published in the 2012 IPC APEX EXPO technical conference proceedings. We investigated the micro-void formation of solder joints after reliability tests such as preconditioning (precon) and thermal cycle (TC) by varying the thickness of Palladium (Pd) in Electroless Nickel / Electroless Palladium / Immersion Gold (ENEPIG) surface finish. We used lead-free solder of Sn-1.2Ag-0.5Cu-Ni (LF35). We found multiple micro-voids of less than 10 µm line up within or above the intermetallic compound (IMC) layer. The number of micro-voids increased with the palladium (Pd) layer thickness. Our results revealed that the micro-void formation should be related to (Pd, Ni)Sn4 phase resulted from thick Pd layer. We propose that micro-voids may form due to either entrapping of volatile gas by (Pd, Ni)Sn4 or creeping of (Pd, Ni)Sn4.
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