Technical Library: solder

Cleanliness of Stencils and Cleaned Misprinted Circuit Boards

Technical Library | 2010-09-09 16:44:48.0

The effectiveness of cleaning stencils and misprinted/dirty printed circuit boards can be effectively monitored. This can be done by washing known clean circuit boards and then checking to see if they have stayed clean as a result of the washing process.

Research In Motion

WHY CLEAN A NO-CLEAN FLUX

Technical Library | 2020-11-04 17:57:41.0

Residues present on circuit boards can cause leakage currents if not controlled and monitored. How "Clean is Clean" is neither easy nor cheap to determine. Most OEMs use analytical methods to assess the risk of harmful residues. The levels that can be associated with clean or dirty are typically determined based on the exposed environment where the part will be deployed. What is acceptably clean for one segment of the industry may be unacceptable for more demanding segments. As circuit assemblies increase in density, understanding cleanliness data becomes more challenging. The risk of premature failure or improper function is typically site specific. The problem is that most do not know how to measure or define cleanliness nor can they recognize process problems related to residues. A new site specific method has been designed to run performance qualifications on boards built with specific soldering materials, reflow settings and cleaning methods. High impedance measurements are performed on break off coupons designed with components geometries used to build the assembly. The test method provides a gauge of potential contamination sources coming from the assembly process that can contribute to electrochemical migration.

KYZEN Corporation

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