Technical Library: soldermasked (Page 1 of 1)

How Detrimental Production Concerns Related to Solder Mask Residues Can Be Countered by Simple Operational Adaptations

Technical Library | 2019-09-19 00:28:48.0

The symbiotic relationship between solder masks and selective finishes is not new. The soldermask application is one of the key considerations to ensure a successful application of a selective finish. The selective finish is the final chemical step of the PCB manufacturing process, this is when the panels are at their most valuable and are unfortunately not re-workable. Imperfections are not tolerated, even if they are wholly cosmetic. Quality issues often manifest themselves in the form of a 'ping pong' conversation between the fabricators, the soldermask suppliers and the selective finish suppliers. Without tangible evidence these discussions are difficult to resolve and the selective finish process is usually regarded as responsible. This paper will focus on the chemical characteristics and use them to predict or identify potential issues before they occur rather than specifically name 'critical' soldermasks. It is also the intention of this paper to address the potential of a soldermask to react to common yield hiking practices like UV bumping and oven curing. It is hoped that this awareness will help fabricators to ensure maximum yields by asking the right questions. 'Critical’ soldermasks impact all selective finishes. In this paper, practical experience using immersion tin will be used to highlight the relationship between 'critical' soldermasks and some of the issues seen in the field. The paper will include a novel approach to identify re-deposited volatiles after the reflow.

Atotech

Use of Non Etching Adhesion Promoters in Advanced PCB Applications

Technical Library | 2011-06-16 18:59:43.0

Based on tests carried out with commercially available chemistry, this paper discusses the advantages available through the use of NEAP processes for inner layer bonding and soldermask pretreatment. The process is characterized with a view to high volume

Atotech

The Effects of PCB Fabrication on High-Frequency Electrical Performance

Technical Library | 2016-07-21 18:16:06.0

Achieving optimum high-frequency printed-circuit-board (PCB) performance is not simply a matter of specifying the best possible PCB material, but can be significantly impacted by PCB fabrication practices. In addition to appropriate circuit materials and circuit design configurations to meet target performance goals, a number of PCB material-related issues can affect final performance, including the use of soldermask, the PCB copper plating thickness, the conductor trapezoidal effect, and plating finish; understanding the effects of these material issues can help when fabricating high-frequency circuits for the best possible electrical performance.

Rogers Corporation

PCB vias design recommendation

Technical Library | 2019-05-29 01:47:22.0

1.Vias near SMD pads: Solder can flow into the via after melted. As a result cold joint will appear in the end. Check the picture below. 2.Vias on SMD pads: Solder can flow into the via more easier after melted. Check the picture below. 3.Via opening without soldermask covered. When workers solder TH parts by hand, soldering iron can touch vias sometime, then tiny amounts molten solder will stay on vias. This can lead to electrical short easily. We recommend you make all vias tenting (covered by solder mask) if it is possible.

PCBNPI-Professional PCB Fab/PCB Assembly Service Provider From China

How Clean is Clean Enough – At What Level Does Each of The Individual Contaminates Cause Leakage and Corrosion Failures in SIR?

Technical Library | 2016-09-08 16:27:49.0

In this investigation a test matrix was completed utilizing 900 electrodes (small circuit board with parallel copper traces on FR-4 with LPI soldermask at 6, 10 and 50 mil spacing): 12 ionic contaminants were applied in five concentrations to three different spaced electrodes with five replicas each (three different bare copper trace spacing / five replications of each with five levels of ionic concentration). The investigation was to assess the electrical response under controlled heat and humidity conditions of the known applied contamination to electrodes, using the IPC SIR (surface insulation resistance) J-STD 001 limits and determine at what level of contamination and spacing the ionic / organic residue has a failing effect on SIR.

Foresite Inc.

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