Technical Library: wafer soldering on pcb (Page 1 of 2)

No-Clean Flux Residue and Underfill Compatibility Effects on Electrical Reliability

Technical Library | 2013-04-11 15:43:17.0

With the explosion of growth in handheld electronics devices, manufacturers have been forced to look for ways to reinforce their assemblies against the inevitable bumps and drops that their products experience in the field. One method of reinforcement has been the utilization of underfills to "glue" certain SMDs to the PCB. Bumped SMDs attached to the PCB with a no-clean soldering process offer the unavoidable scenario of the underfill coming in contact with a flux residue. This may or may not create a reliability issue... First published in the 2012 IPC APEX EXPO technical conference proceedings

Indium Corporation

Study on Solder Joint Reliability of Fine Pitch CSP

Technical Library | 2015-12-31 15:19:28.0

Today's consumer electronic product are characterized by miniatuization, portability and light weight with high performance, especially for 3G mobile products. In the future more fine pitch CSPs (0.4mm) component will be required. However, the product reliability has been a big challenge with the fine pitch CSP. Firstly, the fine pitch CSPs are with smaller solder balls of 0.25mm diameter or even smaller. The small solder ball and pad size do weaken the solder connection and the adhesion of the pad and substrate, thus the pad will peel off easily from the PCB substrate. In addition, miniature solder joint reduce the strength during mechanical vibration, thermal shock, fatigue failure, etc. Secondly, applying sufficient solder paste evenly on the small pad of the CSP is difficult because stencil opening is only 0.25mm or less. This issue can be solved using the high end type of stencil such as Electroforming which will increase the cost.

Flex (Flextronics International)

Effect of Gold Content on the Microstructural Evolution of SAC305 Solder Joints Under Isothermal Aging

Technical Library | 2013-08-29 19:52:43.0

Au over Ni on Cu is a widely used printed circuit board (PCB) surface finish, under bump metallization (UBM), and component lead metallization. It is generally accepted that less than 3 wt.% Au in Sn-Pb solder joints inhibits formation of detrimental intermetallic compounds (IMC). However, the critical limit for Au content in Pb-free solder joints is not well established. Three surface-mount package platforms, one with a matte Sn surface finish and the others with Ni/Au finish, were soldered to Ni/Au-finished PCB using Sn-3.0Ag 0.5Cu (SAC305) solder, in a realistic manufacturing setting. The assembled boards were divided into three groups: one without any thermal treatment, one subjected to isothermal aging at 125°C for 30 days, and the third group aged at 125°C for 56 days...

Agilent Technologies, Inc.

Partially-Activated Flux Residue Impacts on Electronic Assembly Reliabilities

Technical Library | 2016-12-29 15:37:51.0

The reliabilities of the flux residue of electronic assemblies and semiconductor packages are attracting more and more attention with the adoption of no-clean fluxes by majority of the industry. In recent years, the concern of "partially activated" flux residue and their influence on reliability have been significantly raised due to the miniaturization along with high density design trend, selective soldering process adoption, and the expanded use of pallets in wave soldering process. When flux residue becomes trapped under low stand-off devices, pallets or unsoldered areas (e.g. selective process), it may contain unevaporated solvent, "live" activators and metal complex intermediates with different chemical composition and concentration levels depending on the thermal profiles. These partially-activated residues can directly impact the corrosion, surface insulation and electrochemical migration of the final assembly. In this study, a few application tests were developed internally to understand this issue. Two traditional liquid flux and two newly developed fluxes were selected to build up the basic models. The preliminary results also provide a scientific approach to design highly reliable products with the goal to minimize the reliability risk for the complex PCB designs and assembly processes. This paper was originally published by SMTA in the Proceedings of SMTA International

Kester

Assessing the Effectiveness of I/O Stencil Aperture Modifications on BTC Void Reduction

Technical Library | 2018-09-26 20:33:26.0

Bottom terminated components, or BTCs, have been rapidly incorporated into PCB designs because of their low cost, small footprint and overall reliability. The combination of leadless terminations with underside ground/thermal pads have presented a multitude of challenges to PCB assemblers, including tilting, poor solder fillet formation, difficult inspection and – most notably – center pad voiding. Voids in large SMT solder joints can be difficult to predict and control due to the variety of input variables that can influence their formation. Solder paste chemistries, PCB final finishes, and reflow profiles and atmospheres have all been scrutinized, and their effects well documented. Additionally, many of the published center pad voiding studies have focused on optimizing center pad footprint and stencil aperture designs. This study focuses on I/O pad stencil modifications rather than center pad modifications. It shows a no-cost, easily implemented I/O design guideline that can be deployed to consistently and repeatedly reduce void formation on BTC-style packages.

AIM Solder

Numerical Study on New Pin Pull Test for Pad Cratering Of PCB

Technical Library | 2015-02-19 16:54:34.0

Pad cratering is an important failure mode besides crack of solder joint as it’ll pass the regular test but have impact on the long term reliability of the product. A new pin pull test method with solder ball attached and positioning the test board at an angle of 30º is employed to study the strength of pad cratering. This new method clearly reveals the failure mechanism. And a proper way to interpret the finite element analysis (FEA) result is discussed. Impact of pad dimension, width and angle of copper trace on the strength is included. Some findings not included in previous research could help to guide the design for better performance

Flex (Flextronics International)

Statistical Aspect on the Measuring of Intermetallic Compound Thickness of Lead Free Solders

Technical Library | 2018-05-17 11:14:52.0

Intermetallic compound (IMC) growth is being studied in earnest in this past decade because of its significant effect the solder joint reliability. It appears that from numerous investigations conducted, excessive growth of IMC could lead to solder joint failure. Leading to this, many attempts has been made to determine the actual IMC thickness. However, precise and true representation of the growth in the actual 3D phenomenon from 2D cross-section investigations has remained unclear. This paper will focus on the measuring the IMC thickness using 3D surface profilometer (Alicona Focus G4). Lead free solder, Sn3.0Ag0.5Cu (SAC305) was soldered onto copper printed circuit board (Cu PCB). The samples were then subjected to thermal cycle (TC) storage process with temperature range from 0 °C to 100 °C for 200 cycles and up to 1000 cycles were completed.

Universiti Kebangsaan Malaysia

Deep Learning Based Defect Detection for Solder Joints on Industrial X-Ray Circuit Board Images

Technical Library | 2021-05-06 13:41:55.0

Quality control is of vital importance during electronics production. As the methods of producing electronic circuits improve, there is an increasing chance of solder defects during assembling the printed circuit board (PCB). Many technologies have been incorporated for inspecting failed soldering, such as X-ray imaging, optical imaging, and thermal imaging. With some advanced algorithms, the new technologies are expected to control the production quality based on the digital images. However, current algorithms sometimes are not accurate enough to meet the quality control. Specialists are needed to do a follow-up checking. For automated X-ray inspection, joint of interest on the X-ray image is located by region of interest (ROI) and inspected by some algorithms. Some incorrect ROIs deteriorate the inspection algorithm.

Southeast University (SEU)

The Effect of Solder Mask And Surface Mount Adhesive Types on a PCB Manufacturing Process.

Technical Library | 1999-07-21 09:04:04.0

A high volume manufacturer of printed circuit boards (PCBs) had attempted for many years to locate an adhesive that was robust enough to meet their manufacturing needs. This proved to be a challenge because they needed the adhesive to accommodate a wide range of different dispensing equipment and board designs. The two key performance criteria required from the adhesive were dispensability and adhesion...

Henkel Electronic Materials

Effects of PCB Substrate Surface Finish and Flux on Solderability of Lead-Free SAC305 Alloy

Technical Library | 2021-10-20 18:21:06.0

The solderability of the SAC305 alloy in contact with printed circuit boards (PCB) having different surface finishes was examined using the wetting balance method. The study was performed at a temperature of 260 _C on three types of PCBs covered with (1) hot air solder leveling (HASL LF), (2) electroless nickel immersion gold (ENIG), and (3) organic surface protectant (OSP), organic finish, all on Cu substrates and two types of fluxes (EF2202 and RF800). The results showed that the PCB substrate surface finish has a strong effect on the value of both the wetting time t0 and the contact angle h. The shortest wetting time was noted for the OSP finish (t0 = 0.6 s with EF2202 flux and t0 = 0.98 s with RF800 flux), while the ENIG finish showed the longest wetting time (t0 = 1.36 s with EF2202 flux and t0 = 1.55 s with RF800 flux). The h values calculated from the wetting balance tests were as follows: the lowest h of 45_ was formed on HASL LF (EF2202 flux), the highest h of 63_ was noted on the OSP finish, while on the ENIG finish, it was 58_ (EF2202 flux). After the solderability tests, the interface characterization of cross-sectional samples was performed by means of scanning electron microscopy coupled with energy dispersive spectroscopy.

Foundry Research Institute

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