Technical Library | 2019-05-22 21:24:05.0
voidless treatment Smaller components -> miniaturization (01005 capability) Large board handling -> dynamic preheating for large board repair Repeatable processes -> flux and paste application (Dip and Print), residual solder removal (scavenging), dispensing, multiple component handling, and traceability Operator support -> higher automation, software guidance
Technical Library | 2007-08-02 13:24:23.0
This paper presents the results of a joint - three way study between Amkor Technology, Panasonic Factory Solutions and Spansion in the area of package on package (PoP) board level reliability (BLR) (...) The scope of this paper is to cover the already popular 14 x 14mm PoP package size that provides a 152 pin stacked interface which supports a high level of flexibility in the memory architecture for multimedia requirements.
Technical Library | 2017-10-16 15:03:32.0
The miniaturization and advancement of electronic devices have been the driving force of design, research and development, and manufacturing in the electronic industry. However, there are some issues occurred associated with the miniaturization, for examples, warpage and reliability issues. In order to resolve these issues, a lot of research and development have been conducted in the industry and university with the target of moderate melting temperature solder alloys such as m.p. 280°C. These moderate temperature alloys have not resolve these issues yet due to the various limitations. YINCAE has been working on research and development of the materials with lower temperature soldering for higher temperature application. To meet this demand, YINCAE has developed solder joint encapsulant paste to enhance solder joint strength resulting in improving drop and thermal cycling performance to eliminate underfilling, edge bonding or corner bonding process in the board level assembly process. This solder joint encapsulant paste can be used in typical lead-free profile and after reflow the application temperature can be up to over 300C, therefore it also eliminates red glue for double side reflow process. In this paper, we will discuss the reliability such as strength of solder joints, drop test performance and thermal cycling performance using this solder joint encapsulant paste in detail.
Technical Library | 2007-09-27 16:18:15.0
Considerable interest exists in the process known as the pinin- paste, or the Alternative Assembly and Reflow Technology (AART) process. The AART process allows for the simultaneous reflow of both odd-form and through hole devices as well as surface mount components. This process has several advantages over the typical mixed technology process sequence that includes wave soldering and/or hand soldering, often in addition to reflow soldering.
Technical Library | 2016-11-30 15:53:15.0
The use of microvias in Printed Circuit Boards (PCBs) for military hardware is increasing as technology drives us toward smaller pitches and denser circuitry. Along with the changes in technology, the industry has changed and captive manufacturing lines are few and far between. As PCBs get more complicated, the testing we perform to verify the material was manufactured to our requirements before they are used in an assembly needs to be reviewed to ensure that it is sufficient for the technology and meets industry needs to better screen for long-term reliability. The Interconnect Stress Testing (IST) protocol currently used to identify manufacturing issues in plated through holes, blind, or buried vias are not necessarily sufficient to identify problems with microvias. There is a need to review the current IST protocol to determine if it is adequate for finding bad microvias or if there is a more reliable test that will screen out manufacturing inconsistencies. The objective of this research is to analyze a large population of PCB IST coupons to determine if there is a more effective IST test to find less reliable microvias in electrically passing PCB product and to screen for manufacturing deficiencies. The proposed IST test procedure will be supported with visual inspection of corresponding microvia cross sections and Printed Wiring Assembly (PWA) acceptance test results. The proposed screening will be shown to only slightly affect PCB yield while showing a large benefit to screening before PCBs are used in an assembly.
| 1 |
