Technical Library: face (Page 2 of 4)

Placement Optimisation in a Lean Manufacturing Environment

Technical Library | 2008-02-20 21:42:52.0

Tier 2 and Tier 3 EMS companies face increasing pressure from competition in low-cost manufacturing countries to produce assembled boards at lower cost, with increased complexity and to tighter deadlines. They also face an increasing amount of high-mix, small-to-mediumvolume production runs. Even OEMs find it hard to predict what products they will be manufacturing in three to five years time, driving the need to invest in highly flexible production tools that will cater to their needs over the lifetime of the equipment. This paper examines methodologies for optimising the process, improving stock control and providing greater traceability using lean manufacturing techniques.

EUROPLACER

Best Practices for Collecting Product Material and Compliance Data

Technical Library | 2017-02-23 17:23:16.0

Managing the environmental performance of products is an increasingly complicated challenge for manufacturers today. These companies face a complex tangle of requirements and mandates from regulators, consumers and customers to manage the toxicity, recycleability and overall environmental impact of their products. Not only have governments, business-to-business customers and consumers demonstrated a clear preference for better environmentally performing and "greener" brands, but investors are now pressuring manufacturers, as well. For example, the Dow Jones Sustainability Index identifies and tracks leading sustainability-driven companies around the world. This paper focuses on the challenges companies face and the best practices they can employ when collecting substance, material and compliance data from their suppliers and supply chain.

PTC

21st Century Semiconductor Manufacturing Capabilities

Technical Library | 1999-05-06 14:44:11.0

Semiconductor device manufacturers face many difficult challenges as we enter the 21st century. Some are direct consequences of adherence to Gordon Moore's Law, which states that device complexity doubles about every 18 months. Feature size reduction, increased wafer diameter, increased chip size, ultra-clean processing, and defect reduction among others are manifestations that have a direct bearing on the cost and quality of products, factory flexibility in responding to changing technology or business conditions, and on the timelines of product delivery to the ultimate customer.

Intel Corporation

Parallel SmartSpice: Fast and Accurate Circuit Simulation Finally Available

Technical Library | 1999-07-20 10:35:30.0

Circuit simulation is a necessary everyday tool to circuit designers who need to constantly verify and debug their circuits during the design process. As engineers face larger, more complex designs and tighter project schedules, fast SPICE simulation with no loss in accuracy has become a necessity. Simulation indeed accounts for a large portion of the time spent in the design and optimization of a new circuit...

Silvaco

Fragility of Pb-free Solder Joints

Technical Library | 2007-04-18 19:23:22.0

Recent investigations have revealed that Pb-free solder joints may be fragile, prone to premature interfacial failure particularly under shock loading, as initially formed or tend to become so under moderate thermal aging. Depending on the solder pad surface finish, different mechanisms are clearly involved, but none of the commonly used surface finishes appear to be consistently immune to embrittlement processes. This is of obvious concern for products facing relatively high operating temperatures for protracted times and/or mechanical shock or strong vibrations in service.

Universal Instruments Corporation

Design Environment ROI: How Design Teams On A Budget Can Build A Best In Class Design Environment

Technical Library | 2008-04-22 16:57:45.0

Design workflow is the core to your design team's competitive advantage; it’s the conduit by which you turn your team's expertise and ideas into manufacturable products. And yet, all engineering teams face the challenge of maximizing their productivity within limited financial resources. How can the less-capitalized teams develop a design workflow that competes with the highly-capitalized teams? Simple: open tools.

Sunstone Circuits

Meeting Heat And CTE Challenges Of PCBs And ICs

Technical Library | 2008-11-13 00:06:32.0

The electronics industry is facing issues with hot spots, solder joint stresses and Coefficient of Thermal Expansion (CTE) mismatch between PCB and IC substrate. Flip chip type packages for example have very low CTE compared to traditional PCB material. Thus it is necessary to have low CTE printed circuit boards in order to keep solder joint intact with such low CTE packages. There are currently several materials available in the market to address thermal and CTE challenges but each material has its own advantages and limitations...

Stablcor

01005 Assembly, the AOI route to optimizing yield

Technical Library | 2009-07-15 12:14:31.0

The increasing demand for smaller & smaller portable electrical devices is leading to the increasing usage of extremely small components in the SMT assembly lines. With the introduction of 01005 packages in mass production, all the different stages of the line are facing new challenges: from board design, through component placement to reflow process. Each stage introduces some specific types of defect which are considered impossible to repair due to the small size of the package. AOI has become an essential tool to enable good yield in the assembly of 01005.

Vi TECHNOLOGY

Today's Smaller Cables Require Automated Processing

Technical Library | 2016-06-21 09:15:31.0

The trends in mobile electronics today are smaller, thinner and lighter. Yet, mobile devices are more powerful than ever. Applications, like wireless internet connections, RFID and Bluetooth, that have become essential in today’s devices, require more complex transmission mechanisms. As a result, manufacturers find themselves faced with the challenge of working with ultra-miniature RF cable assemblies.

Schleuniger, Inc.

Miniaturizing IoT Designs

Technical Library | 2016-11-23 00:26:50.0

As we wirelessly connect more and more devices to the Internet, electronics engineers face several challenges, including how to package a radio transmitter into their existing device real estate and how to make increasingly smaller devices. They’re also striving to meet consumer demand for Internet of Things (IoT) products that are ergonomically easy to use and unobtrusive to the environment. This whitepaper explores the challenges that come with designing connected devices into increasingly smaller products, specifically antenna integration, and how system-inpackage modules can help.

Silicon Labs


face searches for Companies, Equipment, Machines, Suppliers & Information

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Training online, at your facility, or at one of our worldwide training centers"
Equipment Auction - Eagle Comtronics: Low-Use Electronic Assembly & Machining Facility 2019 Europlacer iineo + Placement Machine  Test & Inspection: Agilent | Tektronix | Mantis Machine Shop: Haas VF3 | Haas SL-20 | Mult. Lathes

Software programs for SMT placement and AOI Inspection machines from CAD or Gerber.