Electronics Forum: plating (Page 195 of 260)

Accidental solder mask

Electronics Forum | Wed Dec 18 10:10:07 EST 2002 | davef

No, sorry not on "Dave's Bookshelf". My basis is a study done at IBM. I reference it here: http://www.smtnet.com//forums/index.cfm?fuseaction=view_thread&CFApp=1&Thread_ID=4941&#Message19050 Responding differently, you're correct. If you have a

fine pitch/BGA component handling

Electronics Forum | Thu Dec 19 11:30:11 EST 2002 | russ

What temp. are you planning on baking them? If this is long term process I would recommend that you hav trays made out of an appropriate ESDS material that can withstand your bake temp (such as duropol)for your QFPs. You can have several patterns/pa

capacitor voltage rating

Electronics Forum | Fri Jan 10 10:09:42 EST 2003 | mantis

Hi In selecting or substituting a capacitor for use, consideration must be given to (1) the value of capacitance desired and (2) the amount of voltage to be applied across the capacitor. If the voltage applied across the capacitor is t

Stenciling chipbonder.....

Electronics Forum | Wed Jan 22 13:17:48 EST 2003 | slthomas

We're considering stenciling SMT adhesive to increase throughput. This is an as-of-yet unproven process and for that matter pcb design (we've never done anything with more than about 50 SMT parts on the bottom, this board has in excess of 1200, but

Wave Soldering - Icicling/Bridges

Electronics Forum | Fri Jan 24 17:05:17 EST 2003 | Hoss67

DDave, I do not have the benefit of having the old machine here for comparison unfortunately. Comparing topside wetting to old sample boards run on the older machine show similar results. No solder balls. I have a thermal profiler and have run ma

Voiding in CSP Ground pad

Electronics Forum | Mon Feb 03 22:48:00 EST 2003 | vinesh

Hi all, We are using small CSPs (10x10mm) in one of our products which has a big ground pad in the center (7x7mm). The maximum voiding allowed on this big pad is also no greater than 25% which we are finding very hard to achieve. The centre pad ha

Plated through via's in pads.

Electronics Forum | Wed Feb 05 13:08:20 EST 2003 | joeherz

You're correct that a thicker solder deposit will make bridging on fine pitch devices a bigger risk. Another alternative could be to slightly over-print the pads (onto the soldermask) ala pin-in-paste process. Basically adding enough solder to fill

Plated through via's in pads.

Electronics Forum | Thu Feb 06 09:53:38 EST 2003 | genny

Actually, the most common reason I have seen vias in pads is for grounds in RF applications where the frequencies are high enough that you need a ground RIGHT THERE!... not .1" away. Vias and traces have RF properties of capacitance and inductance,

Plated through via's in pads.

Electronics Forum | Thu Feb 06 14:47:50 EST 2003 | MA/NY DDave

Hi "some customers/designers want to have via holes to be present in the PCB pad, due to some belief that it helps in heat dissipation. " As I think about this I don't know exactly why they would be concerned. I can imagine in some exotic products

Plated through via's in pads.

Electronics Forum | Mon Feb 10 21:30:48 EST 2003 | MA/NY DDave

Hi You are probably right. The only thing I will tell you is that one time as thee DFM engineer working between many electronic designers, component manufacturers and CEMs (contract electronic manufacturers) the component manufacturer would not bud


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