Electronics Forum | Wed Jun 23 01:37:38 EDT 2010 | tpvnew
Thanks for the input and advise. Yes, indeed, for single or just few products, to get the lowest ones should be no problem. However, I am facing so many products in the line, and the mix is changed all the time, it is difficult (for me, at least) to
Electronics Forum | Wed Jun 30 03:56:45 EDT 2010 | tpvnew
Thanks for the input. I am reading IPC9850 and have a question on its statement. ========================================================== 4.2.9 Preventative Maintenance (PM) Time ... Calculation Method: Multiply the amount of time required for ea
Electronics Forum | Tue Jun 22 00:20:21 EDT 2010 | leadthree
Pick & Place > Wave-solder > other parts > test > conformal coating Is there any production error that could make a ceramic cap conductive? PS: want to add one point: The caps don't seem to be cracked. We changed a few 100 and didn't notice any bro
Electronics Forum | Sat Jun 26 02:32:32 EDT 2010 | prinsisgarcee
how do i calculate false call rate? i got this equation = [over reject / (total solder joints + components) ] * 1000000 and i got a table which shows data like number of solder joints, components on panel, and number of false call, and the false
Electronics Forum | Thu Jul 01 10:54:11 EDT 2010 | smt_guy
with what i'm reading here now i have many additional good points to think about. i am still in the process of countering a possible issue of a multi-reel issue for common parts that's needed by 3 lines...how ill trace the reel numbers to provide to
Electronics Forum | Thu Jul 01 11:29:32 EDT 2010 | swag
We build thousands of flex boards in array format. The fiducial quality for both global and local fids give us much trouble and it seems to be inherent of flex PCB mfg. I am trying to write an internal ducument for our PCB fab house to adhere to.
Electronics Forum | Tue Jul 06 10:08:20 EDT 2010 | swag
Thanks - we have tried everything you can imagine with machine settings as well as burnishing and flatening fids with irons. I don't want to deal with it in house. The volumes are huge and we don't want to do any touch-ups. I am really looking for
Electronics Forum | Fri Jul 02 09:27:36 EDT 2010 | remullis
I am new to flex circuit manufacturing, placing SMT. We have a need to use this technology, but I have no experience in the process. The sample our design engineers have obtained are from a company called Allflex. How does this process work? printi
Electronics Forum | Tue Jul 06 00:23:11 EDT 2010 | cksam
I am doing the case study of the component chip 0201 tombstoning problem. The significant causes was the reflow profiling preheat slope or ramp up rate. I really can't differential between preheat slope and ramp up rate. Could anyone here show me the
Electronics Forum | Tue Jul 06 08:28:16 EDT 2010 | Sean
Hi all, Recently, we found the IC lead dewetting as shown in the attached file..This problem only happen on particular lead only...We checked our reflow profile and its look everything is fine..We did cross section and EDX..I think this could be mat
