Electronics Forum: seeing (Page 494 of 725)

Wavesoldering Defect

Electronics Forum | Tue Sep 14 18:27:37 EDT 2004 | MikeF

I would need a little more information to be able to rule out some of the possible causes. Have you checked to see if the pins with the minimal solder have anything in common, do all have traces to them? or internal power or ground plane connections?

Wavesoldering Defect

Electronics Forum | Tue Sep 28 17:56:02 EDT 2004 | Vee Sar

Adam, I would first check hole to lead sizes on the components that you are having hole fill issues with to see that the spacing is withing spec. Second, check for oxides on lead tips, and contaminated leads that cause poor wetting and insufficient

Labeling of SMT solder stencils

Electronics Forum | Tue Sep 14 14:25:35 EDT 2004 | scombs

Thanks everyone for all the input. All of our stencils do have the PCB # etched on the foil but when operators look for the stencils they are looking for the part # on the frame since they are all stored vertically in a couple of Remstar shuttles and

Pick and place labels

Electronics Forum | Fri Sep 24 12:02:57 EDT 2004 | Frank

Yes, I can see your problem, the nozzle makes only good contact in the center and so the ends don't make good contact. The ends tend to curl up during reflow. There were two suggestions to solve this. 1) Let the operator push down the labels befor

Calculating Reflow Slope

Electronics Forum | Tue Oct 05 20:07:12 EDT 2004 | davef

We do not know how your KIC2000 calculates slope. Here's an approach to calculating slope: * Subtract the lower temperature from the upper temperature. [Temp|upper-Temp|lower] = Temp|change * Subtract the time when the lower temperature was measured

Soldermask Defined BGA Pads

Electronics Forum | Wed Oct 20 07:09:12 EDT 2004 | mattkehoe

Not really. Our process is a solid solder deposition application so we are not placing components into the wet paste prior to reflow. We print the paste then reflow is without components, trying to create a meniscus which is then washed, flattened,

Max temp on a lead free part

Electronics Forum | Mon Oct 18 22:15:11 EDT 2004 | KEN

I have two industry leading customers that have specific requirements for components to survive 30 seconds above 230C. In one case I have a custom ASIC that is heat sinked on the die (to the PCB). The sink pulls heat out of the lead frame very effi

X-Ray Criteria for BGA Solder Ball

Electronics Forum | Wed Oct 20 14:24:32 EDT 2004 | Steve Gregory

It all depends where the voids are, and that's tough to do with a transmission x-ray. One needs to be able tilt the assembly at 45-degrees during x-ray, so you can get an idea where the void is. Or, you spend some big bucks for an x-ray laminography

X-Ray Criteria for BGA Solder Ball

Electronics Forum | Wed Oct 20 14:44:24 EDT 2004 | Steve Gregory

It all depends where the voids are, and that's tough to do with a transmission x-ray. One needs to be able tilt the assembly at 45-degrees during x-ray, so you can get an idea where the void is. Or, you spend some big bucks for an x-ray laminography

Stencil Tension

Electronics Forum | Mon Oct 25 21:19:06 EDT 2004 | davef

Q1: I thought we have a industry standard for this. A1: We're unaware of such a standard. IPC-7525 - Stencil Design Guidelines has a brief section on stencil inspection. We've talked about it previously on SMTnet. If you can't find it in the Archiv


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