Electronics Forum | Wed Jul 12 23:29:23 EDT 2006 | KEN
Ah yes Mechanical Engineers. My previous company hired one Fresh out of College. Ink was still wet on his B.S. degree when he entered the shop. I passed by his desk. He had a CAD drawing on the monitor which he was feverously working on. It showe
Electronics Forum | Tue Aug 22 14:59:55 EDT 2000 | Mike Naddra
What does the reflow profile look like , the question I had was surrounding the higher reflow temperature and the max temperature that lowest thermal mass components will see. Some other questions that I had were surrounding the components , what of
Electronics Forum | Tue Mar 09 18:21:37 EST 1999 | Stan Levitsky
We will wave solder a board with SOIC14 and SOIC16 parts on the bottom. It has been difficult to find any specific wave solder process recommendations from manufacturers of the SOICs. The pad geometry utilizes theiving pads on both sides to reduce br
Electronics Forum | Sat Aug 15 07:56:16 EDT 1998 | Clyde F.
| | We need BGA rework station and x-ray inspector recently in urget case, Do you have any information to rework FPGA package and inspect them during processing. | Thx for any information | Best Regards, | Stoney Tsai PACE just came out with a new s
Electronics Forum | Thu Jan 24 09:53:56 EST 2002 | davef
You didn�t tell us about your solder, wave temperature profile, or the distribution of the problem. So, let�s assume the solder is near eutectic and the problem is wide spread. Wolfgang makes good points. So, let's talk a different tact. When we
Electronics Forum | Fri Jan 30 14:20:55 EST 2009 | scottp
I do a lot of thermal cycle testing of new components for my company and often when I lay out a test board I'm trying to simulate 4 or 6 layer boards but I don't need them for routing so I just use a solid fill of a cross-hatch pattern. I've done it
Electronics Forum | Thu Mar 28 15:53:49 EDT 2019 | SMTA-Jon
As a CM, we don’t have a lot of input on the PCB layouts we receive. Some engineers/software packages output the paste layer 1 to 1, some do an across the board reduction, and some set each part up individually with different reductions per footprin
Electronics Forum | Wed Apr 21 00:35:31 EDT 1999 | Scott Cook
| Netters, | | When I reflow a PCB there is a discoloration of silkscreen and mask. It appears if Profile is too hot! But I dont think so, maybe I'm wrong? | | 1. Kester 293 no clean | 2. 2.1 C/s for 30s to 150 C | 3. .5 - .7 C/s for 60s to 185
Electronics Forum | Tue Dec 10 14:10:38 EST 2002 | Randy Villeneuve
Steve, I wave solder most if not all our boards with selective wave pallets. I did not catch if the solder balls were on top of the board or on the bottom but that will make a difference on what to do to get rid of them. Pallets are good and bad. On
Electronics Forum | Tue Jul 17 21:48:09 EDT 2007 | davef
Per ESD Handbook TR 20.20 paragraph 5.3.15 Humidity "Humidity is beneficial in all ESD Control Program Plans. Contact and separation of dry materials generates greater electrostatic charges than moist materials because moisture provides conductivity
