Electronics Forum | Thu Nov 15 09:29:03 EST 2007 | jaimebc
Just to add to the subject, we experienced insufficient solder on our QFN's at our prototype level. To correct it, we went to a 5 mil stencil, 20% reduction on QFN pertures and used QFN's with solder bumps on the pads. We had great results using thi
Electronics Forum | Tue Nov 27 08:21:43 EST 2007 | shy
How many mils the gap between the terminal and pad? Your practice is for technology SMT-4? What is problem with glue cure? is it due to the reflow profile? how long the glue can be keep in room temperature with humidity 40-60?
Electronics Forum | Sun Jan 06 22:48:42 EST 2008 | mac88
Hi, Just put the ID Badge on a EDS-Safe carrier. From "All-Spec" catalog: #1196-3722 - Personnel Badge Holder Clear Dissipative 3.75"x2.25" 6mil with Clip
Electronics Forum | Wed Jan 09 19:04:48 EST 2008 | pnguyvu
5 mil thick is the max and no reduction Any question feel free give me a call @ 714-636-6211 or email me Steve@usastencils.com Regards Steve
Electronics Forum | Thu Apr 03 11:14:05 EDT 2008 | johnivanov
Hello, I need names of good, reliable PCB houses capable of doing 4 mil laser drilled vias. Any input is appreciated. Thanks,
Electronics Forum | Fri May 23 08:51:23 EDT 2008 | bandjwet
Does anyone have any great ideas and suggestions for the rework of small package (5 x 7mm) QFNs with raised pads (3 mils off of the bottom of the package). IO count is 36. BWET
Electronics Forum | Fri Jul 18 16:29:30 EDT 2008 | grics
Thats it. 6 mils works great with a 10% reduction. We had also had some issues with our p&p placing the parts to hard and smashing out paste causing a bead to form in the middle of our 0805 packages.
Electronics Forum | Fri Aug 22 15:26:18 EDT 2008 | rway
I rarely use blk fiducials. But when I do, they are always programmed after the fids. It's the fids that sets your general alignment of the panel. I only use blk fidus for thin pcbs (30 mil) that tend to warp when on the conveyor.
Electronics Forum | Tue Sep 16 21:52:19 EDT 2008 | rayjr1491
10x16 by 5 mil stencil gives me a area ratio of .615 unless I am calculating incorrectly. I will try and attach some images tomorrow. By reducing the Y direction my area ratio s below .6 and I thought this was not advisable. Your help is muc appreci
Electronics Forum | Mon Sep 29 11:44:39 EDT 2008 | manishc
We r facing less soder problem with qfp,using 4 mil tencil and lead free paste,tried out different combinations of reflow profile,can anybody suggest?
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