Technical Library | 2018-03-15 07:23:35.0
The SMT assembly process is continuously challenged by the factors which enhance circuit board performance and limit productivity. The pick and place and reflow systems reflect these driven issues by adding more and more controls to their systems, but the fact is one of the age old processes continues to operate within the same rules since the dawn of the SMT assembly world: The SMT screen printing. (...)This paper showcases a new stencil process that was discovered by reverting to the basics:understanding the reason for each stencil material process, focusing on detailed finishes and a disciplined aperture design process, maintaining original designs, and making the correctly designed apertures to control the paste deposition. The test results drove us to focus the efforts on the aperture walls In this paper we will demonstrate with lab tests SMT process results howthe improved paste release results in improved SMT print process performance and its positive impact on SPI yields and EOL performance.
Technical Library | 2016-01-12 11:05:28.0
The electronic industry is currently very interested in low temperature soldering processes such as using Sn/Bi alloy to improve process yield, eliminate the head-in-pillow effect, and enhance rework yield. However, Sn/Bi alloy is not strong enough to replace lead-free (SAC) and eutectic Sn/Pb alloys in most applications. In order to improve the strength of Sn/Bi solder joints, enhance mechanical performance, and improve reliability properties such as thermal cycling performance of soldered electronic devices, YINCAE has developed a low temperature solder joint encapsulant for Sn/Bi soldering applications. This low temperature solder joint encapsulant can be dipped, dispensed, or printed. After reflow with Sn/Bi solder paste or alloy, solder joint encapsulant encapsulates the solder joint. As a result, the strength of solder joints is enhanced by several times, and thermal cycling performance is significantly improved. All details will be discussed in this paper.
Technical Library | 2017-05-17 22:33:43.0
The selective soldering application requires a combination of performance attributes that traditional liquid fluxes designed for wave soldering applications cannot fulfill. First, the flux deposition on the board needs to be carefully controlled. Proper fine tuning of the flux physicochemical characteristics combined with a process optimization are mandatory to strike the right balance between solderability and reliability. However, localization of the flux residue through the drop jet process is not enough to guarantee the expected performance level. The flux needs to be designed to minimize the impact of unavoidable spreading and splashing events.From this perspective a fundamental understanding of the relationships between formulation and reliability is critical. In this application, thermal history of the flux residues (from room temperature to solder liquidus) is a key performance driver. Finally, it is necessary to conduct statistically designed experiments on industrial selective soldering machines in order to map the relationships between flux characteristics and selective process friendliness.
Technical Library | 2017-08-02 20:18:21.0
In this rapidly moving electronics market, fast to market with new products is what separates top performing companies from average companies. A survey conducted by Arthur D. Little revealed that "New-Product Development (NPD) productivity in atop performing company is five times what it is in the average company. The top performer gets five times as much new product output for the same investment." What do they know that the rest of us do not? One winning factor is the use of the Robert Cooper process. (...)This paper will present a Lean Six Sigma approach to "right sizing" the Stage Gate process to be efficient, practical, and easy to manage. Various tools of Stage Gate, along with proven best practice, will be covered. In addition, a reduced Stage Gate model will be discussed for simple, low risk projects.
Technical Library | 2020-03-19 00:23:15.0
In this study, the question was how to perform statistically reliable robust- ness tests for the non-contact drop-on-demand printing of functional fluids, such as solder paste and conductive adhesives. The goal of this study was to develop a general method for hypothesis testing when robustness tests are performed. The main problem was to determine if there was a statistical difference between two means or proportions of jet printing devices. In this study, an example of jetting quality variation was used when comparing two jet printing ejector types that differ slightly in design. We wanted to understand if the difference in ejector design can impact jetting quality by performing robustness tests. and thus answer the question, "Can jetting differences be seen between ejector design 1 and design 2"?
Technical Library | 2017-10-26 01:18:49.0
Nano-coatings have been introduced by various manufacturers, with the promise of addressing some of the challenges relative to solder paste printing. Stated benefits include: Reduced underside cleaning, reduced bridging, improved solder paste release and improvements in yield. With several nano technologies already on the market and more likely to be introduced, how can the performance be quantified? How robust are these coatings? How can an assembler approach the ROI of these coatings? What hidden benefits or negative impacts should be considered? This paper will present a rigorous method for evaluating the performance and economic benefits of solder paste stencil nano-coatings.
Technical Library | 2021-07-06 21:13:36.0
The surface finishes commonly used on printed circuit boards (PCBs) have an effect on solder paste performance in the surface mount process. Some surface finishes are non-planar like hot air solder level (HASL) which can lead to inconsistencies in solder paste printing. Other surface finishes are difficult to wet during reflow like organic solderability preservative (OSP). What is the overall effect of surface finish on solder paste performance? Which solder paste is best for each surface finish? It is the goal of this paper to answer these questions.
Technical Library | 2020-10-27 02:02:17.0
Solder powder size is a popular topic in the electronics industry due to the continuing trend of miniaturization of electronics. The question commonly asked is "when should we switch from Type 3 to a smaller solder powder?" Solder powder size is usually chosen based on the printing requirements for the solder paste. It is common practice to use IPC Type 4 or 5 solder powders for stencil designs that include area ratios below the recommended IPC limit of 0.66. The effects of solder powder size on printability of solder paste have been well documented. The size of the solder powder affects the performance of the solder paste in other ways. Shelf life, stencil life, reflow performance, voiding behavior, and reactivity / stability are all affected by solder powder size. Testing was conducted to measure each of these solder paste performance attributes for IPC Type 3, Type 4, Type 5 and Type 6 SAC305 solder powders in both water soluble and no clean solder pastes. The performance data for each size of solder powder in each solder paste flux was quantified and summarized. Guidance for choosing the optimal size of solder powder is given based on the results of this study.
Technical Library | 2011-01-20 18:43:39.0
PCB stack-up is an important factor in determining the EMC performance of a product. A good stack-up can be very effective in reducing radiation from the loops on the PCB (differential-mode emission), as well as the cables attached to the board (common-mo
Technical Library | 2014-08-14 17:58:41.0
High reliability applications for high performance computing, military, medical and industrial applications are driving electronics packaging advancements toward increased functionality with decreasing degrees of size, weight and power (SWaP) The substrate technology selected for the electronics package is a key enabling technology towards achieving SWaP. Standard printed circuit boards (PWBs) utilize dielectric materials containing glass cloth, which can limit circuit density and performance, as well as inhibit the ability to achieve reliable assemblies with bare semiconductor die components. Ceramic substrates often used in lieu of PWBs for chip packaging have disadvantages of weight, marginal electrical performance and reliability as compared to organic technologies. Alternative materials including thin, particle-containing organic substrates, liquid crystal polymer (LCP) and microflex enable SWaP, while overcoming the limitations of PWBs and ceramic. This paper will discuss the use of these alternative organic substrate materials to achieve extreme electronics miniaturization with outstanding electrical performance and high reliability. The effect of substrate type on chip-package interaction and resulting reliability will be discussed. Microflex assemblies to achieve extreme miniaturization and atypical form factors driven by implantable and in vivo medical applications are also shown.
