Electronics Forum: components edge stress (Page 10 of 66)

Stress On BGA

Electronics Forum | Tue Oct 15 13:35:57 EDT 2002 | Chris Dill

Stress analysis on a component is available ECT (fixture house) Feel free to contact me @ (401)739-7320 x3337 for info. Chris

Pad cratering

Electronics Forum | Mon Jul 23 14:39:11 EDT 2012 | hegemon

I would think that wave solder beneath a BGA component might be a little bit stressful. The board will be expanding much faster than the BGA on the topside. This will cause some stress to the solder joints that might show up as the failure you are

Is anyone conformal coating flex circuits?

Electronics Forum | Wed Jul 01 13:57:07 EDT 2015 | circleprime

I have a customer that is requesting their flex circuit be conformally coated. Is this something that is done? Which coating would stand up to the stresses of flexing? Wouldn't that put stress on the components? Thanks! Shannon

Re: BS

Electronics Forum | Mon Aug 28 12:41:35 EDT 2000 | JAX

MoonMan, I'll take a crack at the list. Feel free to answer the ones I don't! 1. Solderability is a parameter which indicates how well a component can be soldered. As far as Solder Termination Coatings go, here are some up�s and down�s of a few. Ha

Edge Clearance

Electronics Forum | Wed May 03 11:17:25 EDT 2006 | aj

Guys, What DFM is standard for Minimum Edge Clearance on a PCB for Fiducials and components? Any advice appreciated. aj...

Re: Cracked Capacitors

Electronics Forum | Thu Jun 17 10:37:42 EDT 1999 | Brian Wycoff

| | | | | Our company is experiencing cracked caps at our pick and place operations. The caps are being placed onto epoxy dots for subsequent wave solder operations. At present, be have set the pressure of the head at 2 in/lbs. This being down from

Re: Cracked Capacitors

Electronics Forum | Thu Jun 17 11:18:03 EDT 1999 | Ian Clelland

| | | | | | Our company is experiencing cracked caps at our pick and place operations. The caps are being placed onto epoxy dots for subsequent wave solder operations. At present, be have set the pressure of the head at 2 in/lbs. This being down fr

Scored Printed Circuit Boards

Electronics Forum | Wed Aug 01 11:03:20 EDT 2001 | Chip Gill

I read your request for design information on panel layout for V-scoring, and felt the need to respond. Scored PWB's are indeed more efficient to produce and depanel than tab routed PWB's, but there are also drawbacks associated with this method. T

Stress induced during V-score depaneling

Electronics Forum | Fri Jun 17 16:15:41 EDT 2011 | rway

One problem you may have with deeper scoring is not so much broads breaking apart unintentionally, but warping upstream while on the SMT line which can cause sagging. This may give you transport issues from one machine to another, and if you have an

Fine Pitch Rework

Electronics Forum | Mon Jan 14 22:44:36 EST 2002 | juan_flores

Also you have to be carefully because to many stress can damage the component internaly


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