Printed Circuit Board Assembly & PCB Design SMT Electronics Assembly Manufacturing Forum

Printed Circuit Board Assembly & PCB Design Forum

SMT electronics assembly manufacturing forum.

Board Warp And Twist

Tom Gaffney


Board Warp And Twist | 8 August, 2000

Does anyone know a consultant or a good source of information for addressing board warp and twist problems? I am looking for a list of proven remedies that I can try. Thanks!

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Re: Board Warp And Twist | 8 August, 2000

Tom: So is warp or is it twist? They�re different problems, possibly with different sources!!! And possibly different solutions!!!

Consultants to talk to are: Earl Moon (, Werner Engelmeyer (, Les Hymes (

Either way, things to think about are: * How close the board gets to its Tg during the reflow cycle (the closer you get to the Tg the worse the warp gets) * Amount of copper on each side and the balance between the two * Thickness of the board * Overall length x width * Time under temperature * Rate of cool down * Multiple thermal cycles - such as rework - are never a good thing. * MLB constructions (not homogeneous or unbalanced - too resin rich or poor) * Poor supplier process capabilities (lamination cycles) * Poor material selections (usually cheap and dirty), etc.

My best suggestion - get the copper balanced and if possible go to higher Tg materials.

So to help focus this just a little bit, please tell us more about the situation, describing the problem, process, etc

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Bob Willis


Re: Board Warp And Twist | 10 August, 2000

You may care to review the following from my Circuits Assembly page on line.


As production problems go there is one that keeps reoccurring time and time again. The blame is usually distributed evenly between board designer, board purchaser, board manufacturer and the board assembler. Conventional assembly has suffered from the problem now surface mount users will have to come to terms with the circuit board which is not flat. A number of recent consultancy enquires have requested information on flatness specifications and the causes of warp and twist.

As far as the assembler is concerned poor solder paste printing, inconsistent adhesive dispense, misplaced components and skipped solder joints are a fact of life. How many of these problems can be effected by board flatness ? Conventional technology could accommodate bow and twist to a degree, but SMT needs a flat surface from the pads to the resist and the overall board profile. Often board suppliers are criticised they in tern blame the designer and this is were the merry go round starts. The true cause is often unclear with many studies failing to find the route cause.

Technology has made great strides with advancements both in assembly techniques and board fabrication processes but we are still using basic board materials which turn into a limp Kleenex whenever we subject it to heat. The main causes for bow and twist, or warpage as it is more commonly known to engineers, are listed in table 1 below:

Laminate Material and Construction Printed Circuit Board Outline Copper Foil and Plating Thickness Even Design and Circuit Layout Circuit Board Fabrication Packaging and Storage Assembly Baking Cycle Soldering Operations

Unfortunately, it is often difficult to determine the actual cause of failure on the final product apart from highlighting any design deficiencies. A full review of all the manufacturing process stages from the start of circuit board fabrication to the final inspection stages in assembly is the only way to find the true cause. One of the key engineering considerations to be borne in mind is the glass transition temperature of the basic material, for example traditional FR4 glass epoxy laminate has a glass transition temperature between 115-135oC. During recent years more attention has been paid to the use of higher stability materials which cost more.

If during the processing stages, this temperature is exceeded the material changes its state and becomes pliable, when the temperature drops the board becomes rigid again. There are a number of process stages which may affect the board both during the manufacture or assembly operations. If stress is present in the board prior to the heating operation it will often result in board warpage. If, on the other hand, the board or assembly is not supported correctly during heating and cooling cycle it will result in the board having stress built into the material. The design engineer should always aim to layout a balanced construction with copper tracking and earth planes balanced from one side to the other of a two layer circuit.

Fig 1 Example of assembly warped after soldering 0313.jpg

Fig 2 Example of warped PCB after reflow soldering 360.jpg

The same is also true of a multilayer board where the internal construction also need to be balanced. If a bimetallic strip is considered it provides a simple explanation to board warpage. If you have a large copper area on one side of a circuit it will expand and contract during heating. If the second side has a limited copper coverage the forces acting on the laminate will be reduced. It is often the case that single sided boards exhibit movement particularly when heavy copper is specified. The same can be said for the component placement as the components on a double sided board does provide a support. The component layout should be considered as weight placed unevenly on the circuit board will inevitably leave stress in the circuit during the cooling stages after soldering. Large connectors and sockets can also restrict board expansion and contraction leaving a permanent deflection.

The board profile for the final circuit can affect the stress pattern in the material, but the final support during soldering can be a problem causing stress to be introduced during soldering. Internal profiles and cut out's as well as making soldering difficult, can cause an uneven board surface, in this case a break out area should support the board. All the break off sections should have copper layers as this makes the board far more rigid for assembly. As the copper is present to start with it does not add to the cost. Maximising copper coverage on waste areas is a method often used during flexible circuit manufacture to support the circuits.

The circuit manufacturer should consider the basic laminate which he is using and regularly perform tests in its basic state and after etching. The number of glass layers in the laminate and the pre preg should be maximised as this provides better dimensional stability to the final assembly. Storage and incorrect cutting of the copper clad laminate can develop defects in the panel. Baking of boards for resist curing or ink drying can cause problems if the panels are not correctly supported and allowed to sag.

Multilayer bonding, due to poor control of lamination pressure and high temperature variations across the process stack, will build in stress which is only detected at the next high temperature excursion. Reflow of tin/lead coatings or solder levelling raises the board above the glass transition temperature and may cause the board to warp. The dimensional changes are not always noted at this stage due to the size of the process panel and are only noted when the boards are profiled. The fast cooling during washing the flux from the board surface after levelling or reflow is an issue. Also the tendency to use cold water rather than hot water in the first washing operation due to cost reductions is a potential cause of thermal shock for the panel.

The circuit assembler subjects the board to temperatures well above the glass transition temperature of most laminates. Wave soldering may be conducted between 235-255oC where as reflow soldering may subject the board to 215-225oC. If boards are inadequately supported during the process by incorrect jigging they will be left with a permanent warp or twist. Fingers or pin edge conveyor systems used on wave or reflow soldering must be set by operating staff to allow for board expansion. Recently more attention has been paid to supporting the board in both processes and not before time. Boards will always expand as they pass through pre heat and up to soldering temperature. Incorrect jig design used to support boards in mass soldering may securely hold the boards without allowing for expansion, this can be worse than soldering without support.

Assembly companies are often required to bake poor quality boards to overcome outgassing, this can add to distortion if high temperature or poor oven loading procedures are used. The current test methods are documented in British Standards and IPC specifications. Further coverage is given in Preben Lund's handbook "Quality Assessment of Printed Circuit Boards" or on a video tape produced by the IPC. The test method which is most often used requires the board to be placed on a flat surface with the concave side down. A measurement is then taken of the maximum out of flatness condition. The ultimate flatness of a board can be affected by many factors. The key is the full understanding by material and board manufacturers, designers and assembly staff that they can all affect the quality of the final product. A better understanding by each of the parties involved would prevent "Buck Passing" and the inevitable merry go round.

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