Electronics Forum | Tue Jul 31 17:11:28 EDT 2007 | rpadilla
Is the via hole not supposed to be there, or is this by design? If you are trying to fill the via hole with solder and not have voiding issues, I suggest using a type 4 solder powder mesh size. Reason being, anytime you go beyond Type 4 mesh, to so
Electronics Forum | Wed Feb 28 03:57:46 EST 2001 | peterbarton
Are you using a water based flux? Are the solder balls mainly around or near non-plated holes or near the edges of the PCB? If so the preheat must be set so the water content of the flux is fully evaporated before the board hits the solder wave. If
Industry News | 2021-06-17 15:18:27.0
Indium Corporation will feature proven products from its portfolio of high-reliability solder materials at the CEIA Wuhan Seminar on June 24 in Wuhan, China.
Industry News | 2009-04-08 19:13:35.0
MORRISVILLE, NC - February 2009 - Juki Corporation announces that it has been awarded a NPI Award in the category of Selective Soldering for its FlexSolder Series. The award was presented to the company during a Monday, March 30, 2009 ceremony that took place in the Mandalay Bay Resort & Convention Center in Las Vegas before the start of APEX 2009.
Technical Library | 2021-07-20 20:02:29.0
During the manufacturing of printed circuit boards (PCBs) for a Flight Project, it was found that a European manufacturer was building its boards to a European standard that had no requirement for copper wrap on the vias. The amount of copper wrap that was measured on coupons from the panel containing the boards of interest was less than the amount specified in IPC-6012 Rev B, Class 3. To help determine the reliability and usability of the boards, three sets of tests and a simulation were run. The test results, along with results of simulation and destructive physical analysis, are presented in this paper. The first experiment involved subjecting coupons from the panels supplied by the European manufacturer to thermal cycling. After 17 000 cycles, the test was stopped with no failures. A second set of accelerated tests involved comparing the thermal fatigue life of test samples made from FR4 and polyimide with varying amounts of copper wrap. Again, the testing did not reveal any failures. The third test involved using interconnect stress test coupons with through-hole vias and blind vias that were subjected to elevated temperatures to accelerate fatigue failures. While there were failures, as expected, the failures were at barrel cracks. In addition to the experiments, this paper also discusses the results of finite-element analysis using simulation software that was used to model plated-through holes under thermal stress using a steady-state analysis, also showing the main failure mode was barrel cracking. The tests show that although copper wrap was sought as a better alternative to butt joints between barrel plating and copper foil layers, manufacturability remains challenging and attempts to meet the requirements often result in features that reduce the reliability of the boards. Experimental and simulation work discussed in this paper indicate that the standard requirements for copper wrap are not contributing to the overall board reliability, although it should be added that a design with a butt joint is going to be a higher risk than a reduced copper wrap design. The study further shows that procurement requirements for wrap plating thickness from Class 3 to Class 2 would pose little risk to reliability (minimum 5 μm/0.197 mil for all via types).Experimental results corroborated by modeling indicate that the stress maxima are internal to the barrels rather than at the wrap location. In fact, the existence of Cu wrap was determined to have no appreciable effect on reliability.
SMT Express, Volume 2, Issue No. 3 - from SMTnet.com Volume 2, Issue No. 3 Thursday, March 16, 2000 Featured Article Return to Front Page Stencil Design for Mixed Technology Through-hole / SMT Placement and Reflow by William E. Coleman, Photo
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