Jun 29, 2010 
The latest version of its FPGA design software has features aimed specifically for low power and lower cost applications.
“As designs become larger, and FPGAs are increasingly being used in more cost sensitive, high volume applications, designers need an easy to learn, flexible design environment for exploring different implementations to achieve their cost, power, and performance targets,” said Mike Kendrick, Lattice’s manager of software product planning.
According to Kendrick, the new design tool, called Diamond, will allow designers to manage these multiple implementations in one project.
The tool retains the features of the firm’s ispLEVER design environment, including the power calculator, simultaneous switching output noise calculator and the MAP and PAR FPGA implementation algorithms.
A feature of the software is that the design source can be shared among implementations, or each implementation can have its own unique design source.
This should allow different design approaches to be tried to evaluate their effect on design size, cost, performance and power.
“Optimisation options for logic synthesis and place and route are captured as a strategy that can be applied easily to any of the implementations,” said Lattice.
Diamond software also comes with a library of pre-defined strategies, and users can also create their own and add them to this library.
The Diamond design environment is supported on Windows and Linux. It includes support for Windows 7, and under Windows 7 64-bit, Diamond software has access to a full 4G memory space.
The Diamond design environment includes support of Windows XP, Windows Vista (32 bit), and Windows 7 (32-bit and 64-bit), as well as Linux (Red Hat Enterprise Linux and Novell SUSE).
Learn more about Lattice Diamond Design Software at: http://www.latticesemi.com/products/designsoftware/diamond/index.cfm
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