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Mentor Graphics Delivers Comprehensive Design Support for Xilinx 90nm Spartan-3 Platform FPGAs

Apr 17, 2003

WILSONVILLE, Ore., April 16, 2003 - Mentor Graphics Corp. (Nasdaq: MENT), the leader in FPGA design solutions, today announced comprehensive design tool support for the Spartan-3 platform FPGAs from Xilinx, Inc. (Nasdaq: XLNX). The Spartan-3 platform FPGAs were introduced April 14, 2003. Mentor Graphics provides tools for simulation, synthesis, design creation, printed circuit board (PCB) timing verification, and PCB/FPGA integration, continuing its commitment to provide complete design and verification environments tailored for Xilinx leading high-density, low-cost programmable logic devices.

"Mentor Graphics� is the first EDA company to have a fully integrated design and verification solution for 90nm Spartan-3 FPGAs," said Simon Bloch, general manager of FPGA design and synthesis for Mentor Graphics. "Close collaboration with Xilinx enables Mentor to deliver the leading-edge solutions for logic, PCB and system-level design that our mutual customers need today."

"Mentor Graphics has had significant global success in the design spaces Xilinx is aggressively targeting with the new Spartan-3 platform," said Dave Bennett, vice president of Logical Systems Software at Xilinx. "Mentor solutions enable high-volume designs through an easy-to-use development flow for applications such as low-cost routers and storage servers."

Integrated FPGA Design Flow for Xilinx Spartan-3 Platform FPGAs

Creating a multi-million-gate design requires a comprehensive set of design tools tuned to maximize ease-of-use. The FPGA Advantage� tool is a complete integrated design environment (IDE) offering text, tabular, and graphical RTL design creation, design visualization, automatic documentation, sophisticated IP discovery, team design support as well as industrial quality verification and synthesis.

FPGA Advantage includes the ModelSim� logic simulator for superior design verification. Mentor Graphics offers a standalone, Xilinx OEM version of ModelSim, version XE v5.6e, that provides Spartan-3 device designers with enhanced mixed-language simulation features.

FPGA Advantage leverages the PrecisionTM RTL Synthesis tool, the Mentor Graphics next generation synthesis platform, to enable efficient, timing-driven design implementations. The Precision RTL product delivers the most accurate timing analysis, automatically finding and fixing timing problems prior to programming the FPGA, avoiding frustrating, time-consuming design iterations. Mentor Graphics provides synthesis support with both the Precision RTL tool and the LeonardoSpectrumTM environment, enhancing both tools to deliver advanced technology mapping to take full advantage of device features including built-in RAMs, ROMs and multipliers. The result is excellent quality of results including smaller and faster designs.

Making FPGAs PCB-Aware

Traditionally, FPGA design and PCB design is done separately by distinct design teams using different EDA tools and processes. The existence of multiple design processes can create inter-process connectivity and timing closure challenges, which can impact both performance and cost-to-market for designers. Mentor Graphics offers the BoardLinkTM environment, a bi-directional system integration between Mentor's PCB solutions and the FPGA Advantage product or the Xilinx design tools, to help enable a smooth integration of Xilinx Spartan-3 FPGAs on PCBs. The BoardLink tool enables PCB integration by providing custom FPGA schematic symbol generation, user directed symbol fracturing, and PCB schematic updates for FPGA pin changes. This approach provides Spartan-3 users with an FPGA on Board solution that eliminates manual integration errors.

High Speed PCB Level Design Verification Support

The Spartan-3 platform supports many types of high-speed industry standard interfaces and PCB level timing verification can be greatly enhanced through static and symbolic Timing Analysis (STA) tools. The Xilinx ISE 5.2i development tools support Stamp Model Generation, enabling use of the Tau board level Symbolic Timing Analysis tool. Mentor's unique combination of timing analysis together with signal integrity analysis provides a timing driven, high-speed design methodology. The Mentor HyperLynxTM tool and the ICXTM product signal integrity analysis tools can be used in conjunction with the Tau timing analysis product for complete system and PCB verification capability.

Spartan-3 Platform FPGAs

Ranging from 50K to 5M system gates, the 90nm Spartan-3 platform is the world's lowest cost FPGA with unrivaled price points to address customer demand for low cost solutions. With Spartan-3, Xilinx is poised to address entirely new high volume applications in the "sweet spot" of mid-range ASICs - such as low cost routers, storage servers, medical and industrial imaging, and residential gateways - to significantly expand the total available market for the Spartan Series. For complete information about Spartan-3 FPGAs, visit http://www.xilinx.com/spartan3.

About Mentor Graphics

Mentor Graphics Corporation is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support

for the world's most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of about $600 million and employs approximately 3,500 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777; Silicon Valley headquarters are located at 1001 Ridder Park Drive, San Jose, California 95131-2314. World Wide Web site: http://www.mentor.com.

Mentor Graphics, FPGA Advantage, and ModelSim are registered trademarks and Precision, LeonardoSpectrum, Hyperlynx, ICX, BoardLink are trademarks of Mentor Graphics Corporation. All other company or product names are the registered trademarks or trademarks of their respective owners.

For more information, please contact:

Anne Cirkel

Mentor Graphics

503-685-7934

anne_cirkel@mentor.com

Jeremiah Glodoveza

Weber Shandwick

415.354.8375

jglodoveza@webershandwick.com

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