Technical Library | 2023-01-17 17:58:36.0
Heterogeneous integration has become an important performance enabler as high-performance computing (HPC) demands continue to rise. The focus to enable heterogeneous integration scaling is to push interconnect density limit with increased bandwidth and improved power efficiency. Many different advanced packaging architectures have been deployed to increase I/O wire / area density for higher data bandwidth requirements, and to enable more effective die disaggregation. Embedded Multi-die Interconnect Bridge (EMIB) technology is an advanced, cost-effective approach to in-package high density interconnect of heterogeneous chips, providing high density I/O, and controlled electrical interconnect paths between multiple dice in a package. In emerging architectures, it is required to scale down the EMIB die bump pitch in order to further increase the die-to-die (D2D) communication bandwidth. Aa a result, bump pitch scaling poses significant challenges in the plated solder bump reflow process, e.g., bump height / coplanarity control, solder wicking control, and bump void control. It's crucial to ensure a high-quality solder bump reflow process to meet the final product reliability requirements. In this paper, a combined formic acid based fluxless and vacuum assisted reflow process is developed for fine pitch plated solder bumping application. A high-volume production (HVM) ready tool has been developed for this process.
Technical Library | 2021-02-20 00:55:47.0
Customers must be able to rely on accurate humidity indication as an assurance of SMD quality and fitness for processing and use. Without it, they might accept SMDs from suppliers that have already been irreparably damaged by moisture during storage or transit. Or, they might approve for processing SMDs that have been improperly or insufficiently heat-dried. Beyond the processing questions, there are financial questions: Where did the dry pack problems originate and who--supplier, customer, shipper--is financially responsible for the damaged SMDs? In response, Clariant, the originator of the color change humidity indicator card, and a member of the JEDEC's Subcommittee 14.1, "Reliability and Test Methods for Packaged Devices," created a new "non-reversible" halogen and cobalt dichloride free humidity indicator card. This HIC combines two reversible indicators (5% and 10%) with a new non-reversible (60% RH) indicator spot. (Figure 1) The 5% and 10% reversible spots work the way similar indicators do: they change color from blue (dry), to lavender, to pink (wet) to indicate humidity exposure at the indicated levels. If humidity levels drop, they will gradually revert back to blue.
Technical Library | 2023-09-15 11:17:10.0
Ensure the integrity of your components with our SMT Offline X-Ray System. Detect hidden defects and improve the quality of your PCBAs with precise X-ray inspection technology.
Technical Library | 2019-08-19 09:46:13.0
Boundary scan is a method for testing interconnects on printed circuit boards (PCBs) or sub-blocks inside an integrated circuit. It has rapidly become the technology of choice for building reliable high technology electronic products with a high degree of testability. Due to the low-cost and integrated circuit (IC) level access capabilities of boundary scan, its use has expanded beyond traditional board test applications into product design and service.
Technical Library | 2023-09-15 09:58:06.0
Elevate your electronics production with our PCBA Coating Online SMT AOI solution. Achieve precision coating and comprehensive quality assurance in one integrated system. Boost efficiency and reduce defects with cutting-edge automated optical inspection technology.
Technical Library | 2019-05-24 09:27:33.0
Decapsulation, or de-cap, is a failure analysis technique which involves the removal of material packaging from an integrated circuit (IC). After de-cap, visual inspection by optical microscopy of the internal circuitry may reveal areas where damage is most likely to have occurred. In addition, scanning electron microscopy (SEM) with energy dispersive x-ray spectroscopy (EDS) can identify the composition of any anomalies present after de-cap under higher magnification. The removal process of package material can be done either mechanically or chemically depending on the design of the integrated circuit. With ceramic packaging, de-cap is usually done mechanically by chiseling off the top with a fine razor and small hammer. For plastic packaging, de-cap requires chemical etching by strong acids. In this Tech Tips article, de-cap by chemical etching will be outlined step by step.
Technical Library | 2019-05-29 10:38:59.0
Decapsulation, or de-cap, is a failure analysis technique which involves the removal of material packaging from an integrated circuit (IC). After de-cap, visual inspection by optical microscopy of the internal circuitry may reveal areas where damage is most likely to have occurred. In addition, scanning electron microscopy (SEM) with energy dispersive x-ray spectroscopy (EDS) can identify the composition of any anomalies present after de-cap under higher magnification. The removal process of package material can be done either mechanically or chemically depending on the design of the integrated circuit. With ceramic packaging, de-cap is usually done mechanically by chiseling off the top with a fine razor and small hammer. For plastic packaging, de-cap requires chemical etching by strong acids. In this Tech Tips article, de-cap by chemical etching will be outlined step by step.
Technical Library | 2019-06-04 10:19:46.0
Interconnection technology relies very heavily on the ability of the conductors on a printed wiring assembly to maintain reliable signal integrity. Harsh environmental factors can precipitate a loss of conductivity due to oxidation and corrosion. Connections are typically soldered or inserted using pressure fitted connectors to obtain enough surface contact to meet the electrical conductivity requirements. In pressure contacts, surface integrity is especially critical where the abrasive effects of retraction and insertion can wear off the metallic finish from the contact area. This can expose the underlying copper or nickel and lead to increased resistance at the contact points. These types of conductors are frequently found in card edge connectors where the terminations are plated with a layer of nickel and gold (frequently referred to as gold fingers). A hard gold is typically used containing very small amounts of nickel and cobalt to increase the wear resistance.
Technical Library | 2008-10-01 14:02:27.0
This paper proposes an integrated system for film application process than consists of closed loop mass calibration to assure film thickness, a noncontact fast jetting process with high edge definition capable of applying films for highly selective areas and patterns. A system to obtain homogeneity of the solid-fluid mix is described and results are shared.
Technical Library | 2010-03-23 11:50:22.0
This document discuss how to design SMT stencil base on IPC-7525. Introduction: PCBA (Printed Circuit Board Assembly) is a segment of printed circuit board technology. This segment of printed circuit board industry is concentrated in assemble all the pieces of electronic industry to one piece before output them to market. This segment covers: interconnection technology, package design technology, system integration technology, board and system test technology
